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Table 6-14. UARTICR Register Field Descriptions (continued)
Bit
Field
3
DSRMIC
2
DCDMIC
1
CTSMIC
0
RIMIC
SWRU543 – January 2019
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Type
Reset
Description
W1C
0h
Reserved
W1C
0h
Reserved
W1C
0h
UART Clear to Send Modem Interrupt Clear
Writing a 1 to this bit clears the CTSRIS bit in the UARTRIS register
and the CTSMIS bit in the UARTMIS register.
W1C
0h
Reserved
Copyright © 2019, Texas Instruments Incorporated
Universal Asynchronous Receivers/Transmitters (UARTs)
UART Registers
201
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