Aes_Data_In_2 Register; Aes_Data_In_3 Register; Aes_Data_In_2 Register Field Descriptions; Aes_Data_In_3 Register Field Descriptions - Texas Instruments CC3235 SimpleLink Series Technical Reference Manual

AES Registers
17.4.27 AES_DATA_IN_2 Register (Offset = 68h) [reset = 0h]
AES_DATA_IN_2 is shown in
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Data register to read and write plaintext and ciphertext.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Bit Field
31-0 DATA
17.4.28 AES_DATA_IN_3 Register (Offset = 6Ch) [reset = 0h]
AES_DATA_IN_3 is shown in
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Data register to read and write plaintext and ciphertext (LSW).
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Bit Field
31-0 DATA
650
Advance Encryption Standard Accelerator (AES)
Figure 17-40 and described in
Table.
Figure 17-40. AES_DATA_IN_2 Register
Table 17-30. AES_DATA_IN_2 Register Field Descriptions
Type Reset
R/W 0h
Figure 17-41 and described in
Table.
Figure 17-41. AES_DATA_IN_3 Register
Table 17-31. AES_DATA_IN_3 Register Field Descriptions
Type Reset
R/W 0h
Copyright © 2019, Texas Instruments Incorporated
Table 17-30.
DATA
R/W-0h
Description
Data to encrypt or decrypt
Table 17-31.
DATA
R/W-0h
Description
Data to encrypt or decrypt
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SWRU543 – January 2019
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