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2.6.103 Register 4876h (offset = 4876h) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
7-0
FREQ_INIT1[7:0]
2.6.104 Register 4877h (offset = 4877h) [reset = 80h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
7-0
FREQ_INIT1[15:8]
2.6.105 Register 4878h (offset = 4878h) [reset = 7h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
7-0
FREQ_INIT2[7:0]
2.6.106 Register 4879h (offset = 4879h) [reset = 80h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
7-0
FREQ_INIT2[15:8]
SBAU337 – May 2020
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Figure 2-817. Register 4876h
5
4
FREQ_INIT1[7:0]
R/W-0h
Table 2-823. Register 4876 Field Descriptions
Type
Reset
R/W
0h
Figure 2-818. Register 4877h
5
4
FREQ_INIT1[15:8]
R/W-80h
Table 2-824. Register 4877 Field Descriptions
Type
Reset
R/W
80h
Figure 2-819. Register 4878h
5
4
FREQ_INIT2[7:0]
R/W-7h
Table 2-825. Register 4878 Field Descriptions
Type
Reset
R/W
7h
Figure 2-820. Register 4879h
5
4
FREQ_INIT2[15:8]
R/W-80h
Table 2-826. Register 4879 Field Descriptions
Type
Reset
R/W
80h
Copyright © 2020, Texas Instruments Incorporated
3
2
Description
3
2
Description
3
2
Description
3
2
Description
Serial Interface Register Maps
SERDES Register Map
1
0
1
0
1
0
1
0
499
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