Texas Instruments AFE79 Series Programming & User Manual page 187

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Bit
Field
TXC_B0_I_DATA_
0-0
NEGATION
2.3.45 Register 54h (offset = 54h) [reset = 0h]
7
6
ADC_JESD_SYNC_N1_MUX_SEL
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
ADC_JESD_SYNC
6-4
_N1_MUX_SEL
ADC_JESD_SYNC
2-0
_N0_MUX_SEL
2.3.46 Register 55h (offset = 55h) [reset = 32h]
7
6
ADC_JESD_SYNC_N3_MUX_SEL
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
ADC_JESD_SYNC
6-4
_N3_MUX_SEL
ADC_JESD_SYNC
2-0
_N2_MUX_SEL
SBAU337 – May 2020
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Table 2-88. Register 53 Field Descriptions (continued)
Type
Reset
R/W
Figure 2-86. Register 54h
5
4
R/W-0h
Table 2-89. Register 54 Field Descriptions
Type
Reset
R/W
R/W
Figure 2-87. Register 55h
5
4
R/W-3h
Table 2-90. Register 55 Field Descriptions
Type
Reset
R/W
R/W
Copyright © 2020, Texas Instruments Incorporated
Description
Determines whether the data is to be negated or not.
0h
0 : Normal data (No negation)
1 : 2's complement (negation)
3
2
ADC_JESD_SYNC_N0_MUX_SEL
Description
adc_jesd_sync_*_mux and adc_jesd_sync_*_reorder registers
together implement the sync reorder and broadcast
0h
funcationlity.
This register is used for change the sync_n pin order.
Using LATTE to configure this register is recommended.
adc_jesd_sync_*_mux and adc_jesd_sync_*_reorder registers
together implement the sync reorder and broadcast
0h
funcationlity.
This register is used for change the sync_n pin order.
Using LATTE to configure this register is recommended.
3
2
ADC_JESD_SYNC_N2_MUX_SEL
Description
adc_jesd_sync_*_mux and adc_jesd_sync_*_reorder registers
together implement the sync reorder and broadcast
3h
funcationlity.
This register is used for change the sync_n pin order.
Using LATTE to configure this register is recommended.
adc_jesd_sync_*_mux and adc_jesd_sync_*_reorder registers
together implement the sync reorder and broadcast
2h
funcationlity.
This register is used for change the sync_n pin order.
Using LATTE to configure this register is recommended.
JESD_SUBCHIP Register Map
1
0
R/W-0h
1
0
R/W-2h
Serial Interface Register Maps
187

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