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RX Top Register Map
2.13.249 Register 50Dh (offset = 50Dh) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
RX_AGC_BAND1_
2-0
LNA_GAIN8[10:8]
2.13.250 Register 50Eh (offset = 50Eh) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
RX_AGC_BAND1_
7-0
LNA_GAIN9[7:0]
2.13.251 Register 50Fh (offset = 50Fh) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
RX_AGC_BAND1_
2-0
LNA_GAIN9[10:8]
2.13.252 Register 510h (offset = 510h) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
786
Serial Interface Register Maps
Figure 2-1661. Register 50Dh
5
4
Table 2-1674. Register 50D Field Descriptions
Type
Reset
R/W
0h
Figure 2-1662. Register 50Eh
5
4
RX_AGC_BAND1_LNA_GAIN9[7:0]
R/W-0h
Table 2-1675. Register 50E Field Descriptions
Type
Reset
R/W
0h
Figure 2-1663. Register 50Fh
5
4
Table 2-1676. Register 50F Field Descriptions
Type
Reset
R/W
0h
Figure 2-1664. Register 510h
5
4
RX_AGC_BAND1_LNA_GAIN10[7:0]
R/W-0h
Copyright © 2020, Texas Instruments Incorporated
3
2
RX_AGC_BAND1_LNA_GAIN8[10:8]
Description
LNA Gain for Band1 for temp index 8 in case of External LNA
Control , Gain for DVGA Index 40 in case of External DVGA
control
3
2
Description
LNA Gain for Band1 for temp index 9 in case of External LNA
Control , Gain for DVGA Index 41 in case of External DVGA
control
3
2
RX_AGC_BAND1_LNA_GAIN9[10:8]
Description
LNA Gain for Band1 for temp index 9 in case of External LNA
Control , Gain for DVGA Index 41 in case of External DVGA
control
3
2
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1
0
R/W-0h
1
0
1
0
R/W-0h
1
0
SBAU337 – May 2020
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