Texas Instruments AFE79 Series Programming & User Manual page 851

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Bit Field
RX_DDC_ROOT_
0-0
CLOCK_GATE
2.13.468 Register 770h (offset = 770h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
0-0 RX_DDC_PDN
2.13.469 Register 771h (offset = 771h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
RX_DDC_PRE_DE
0-0
CIM_PDN
2.13.470 Register 772h (offset = 772h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
RX_DDC_DECIM_
0-0
PDN
SBAU337 – May 2020
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Table 2-1892. Register 740 Field Descriptions
Type Reset
R/W 1h
Figure 2-1880. Register 770h
5 4
Table 2-1893. Register 770 Field Descriptions
Type Reset
R/W 0h
Figure 2-1881. Register 771h
5 4
Table 2-1894. Register 771 Field Descriptions
Type Reset
R/W 0h
Figure 2-1882. Register 772h
5 4
Table 2-1895. Register 772 Field Descriptions
Type Reset
R/W 0h
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Description
Gate/ungate the root clock to the RX digital.
0: Ungate
1: Gate
3 2
Description
Power down the complete RX channel
1 : Power down the entire RX channel
0 : Normal mode of operation
3 2
Description
Power down the pre-decimation section of RX channel
1 : Power down the Pre DDC blocks of the RX channel
0 : Normal mode of operation
3 2
Description
Power down the DDC section of RX channel
1 : Power down the Dec Chain blocks of the RX channel
0 : Normal mode of operation
Serial Interface Register Maps
RX Top Register Map
1 0
RX_DDC_PDN
R/W-0h
1 0
RX_DDC_PRE
_DECIM_PDN
R/W-0h
1 0
RX_DDC_DECI
M_PDN
R/W-0h
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