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2.4.145 Register B9h (offset = B9h) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
JESD_SHORTTES
7-0
T_INPUT0[15:8]
2.4.146 Register BAh (offset = BAh) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
JESD_SHORTTES
7-0
T_INPUT1[7:0]
2.4.147 Register BBh (offset = BBh) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
JESD_SHORTTES
7-0
T_INPUT1[15:8]
2.4.148 Register BCh (offset = BCh) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
SBAU337 – May 2020
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Figure 2-374. Register B9h
5
4
JESD_SHORTTEST_INPUT0[15:8]
R/W-0h
Table 2-378. Register B9 Field Descriptions
Type
Reset
R/W
0h
Figure 2-375. Register BAh
5
4
JESD_SHORTTEST_INPUT1[7:0]
R/W-0h
Table 2-379. Register BA Field Descriptions
Type
Reset
R/W
0h
Figure 2-376. Register BBh
5
4
JESD_SHORTTEST_INPUT1[15:8]
R/W-0h
Table 2-380. Register BB Field Descriptions
Type
Reset
R/W
0h
Figure 2-377. Register BCh
5
4
JESD_SHORTTEST_INPUT2[7:0]
R/W-0h
Copyright © 2020, Texas Instruments Incorporated
3
2
Description
short test pattern input
3
2
Description
short test pattern input
3
2
Description
short test pattern input
3
2
Serial Interface Register Maps
DAC JESD Register Map
1
0
1
0
1
0
1
0
317
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