www.ti.com
Bit
Field
FB_DDC_NCO3_F
7-0
CW[23:16]
2.14.25 Register AFh (offset = AFh) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
FB_DDC_NCO3_F
7-0
CW[31:24]
2.14.26 Register E0h (offset = E0h) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
FB_DDC_NCO0_P
7-0
HASE_OFFSET[7:
0]
2.14.27 Register E1h (offset = E1h) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
FB_DDC_NCO0_P
7-0
HASE_OFFSET[15
:8]
SBAU337 – May 2020
Submit Documentation Feedback
Table 2-1921. Register AE Field Descriptions
Type
Reset
R/W
0h
Figure 2-1908. Register AFh
5
4
FB_DDC_NCO3_FCW[31:24]
R/W-0h
Table 2-1922. Register AF Field Descriptions
Type
Reset
R/W
0h
Figure 2-1909. Register E0h
5
4
FB_DDC_NCO0_PHASE_OFFSET[7:0]
R/W-0h
Table 2-1923. Register E0 Field Descriptions
Type
Reset
R/W
0h
Figure 2-1910. Register E1h
5
4
FB_DDC_NCO0_PHASE_OFFSET[15:8]
R/W-0h
Table 2-1924. Register E1 Field Descriptions
Type
Reset
R/W
0h
Copyright © 2020, Texas Instruments Incorporated
Description
Frequency control word (FCW) for nco3.
The System Configuration Macros automatically configure this.
3
2
Description
Frequency control word (FCW) for nco3.
The System Configuration Macros automatically configure this.
3
2
Description
Offset phase for nco0
3
2
Description
Offset phase for nco0
Serial Interface Register Maps
FB Top Register Map
1
0
1
0
1
0
867