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S/PDIF Connector
Buzzer
S/PDIF
SPDIF out
Key
Ground
LAN 2
SPDIF in
+5V
LAN 1
1
5
USB 1-2
USB 3.0
USB 3-4
USB 3.0
HDMI (default)/DP
DVI
DC-in
The S/PDIF connector is an audio interface for transmitting digital audio signals. The system
includes an S/PDIF header on the board.
User's Manual | KS-SD
2
Parallel
26
2
10
Front Audio
1
9
S/PDIF
1
25
1
5
Auto Power-on
2
12
Front
Select (JP11)
DIO
DIO Power
Panel
USB 2.0
9
1
5
DDR4_1 SODIMM
DDR4_2 SODIMM
1
System
Fan 1
Clear CMOS
Data (JP1)
1
1
ECX
SPI Flash
BIOS
LPC
14
2
1
SATA 3.0
SATA 1
SATA 0
1
1
1
1
4
4
1
COM 1
System
Fan 2
6
6
4-pin DC-out
JP2
JP3
VGA
1
2
1
2
1
J22
6
J21
PCIe x16 (PCIE1)
2
1
PCIe x4 (PCIE2)
LPC Connector
2
10
Front Audio
1
9
Buzzer
S/PDIF
1
5
DIO
1
USB 2.0
9
1
5
Power Button
Power LED
HDD LED
6
6
1
1
Reset
LAN 2
(JP4)
(JP10)
STB_LED
LAN 1
2
10
COM 4
1
9
(JP9) (JP16)
ECX
6
6
1
1
USB 1-2
USB 3.0
(JP8) (JP15)
6
6
1
1
LPC
2
10
14
USB 3-4
USB 3.0
COM 3
1
9
2
10
COM 2
2
1
1
9
(JP7) (JP14)
6
HDMI (default)/DP
6
COM 2
SATA 3.0
2
2
1
1
SATA 0
(JP13)
(JP6)
1
6
6
1
1
(JP12)
DVI
(JP5)
6
6
1
1
1
2
10
COM 1
1
9
16
2
1
DC-in
The Low Pin Count Interface was defined by Intel
towards legacy free systems. It allows the integration of low-bandwidth legacy I/O components
within the system, which are typically provided by a Super I/O controller. Furthermore, it can be
used to interface firmware hubs, Trusted Platform Module (TPM) devices and embedded controller
solutions. Data transfer on the LPC bus is implemented over a 4 bit serialized data interface, which
uses a 24MHz LPC bus clock. For more information about LPC bus, please refer to the Intel
Pin Count Interface Specification Revision 1.1. The table below indicates the pin assignments of
the LPC connector.
Pin
Pin Assignment
1
L_CLK
3
L_RST#
5
L_FRAME#
7
L_AD3
9
L_AD2
11
INT_SERIRQ
13
5VSB
2
Parallel
26
1
25
Auto Power-on
2
12
Front
Select (JP11)
DIO Power
1
Panel
Power Button
DDR4_1 SODIMM
Power LED
HDD LED
6
6
DDR4_2 SODIMM
1
1
1
System
Reset
(JP4)
(JP10)
Fan 1
STB_LED
Clear CMOS
Data (JP1)
1
2
10
COM 4
1
1
9
(JP9) (JP16)
SPI Flash
6
6
BIOS
1
1
(JP8) (JP15)
6
6
1
1
2
10
COM 3
1
9
2
10
COM 2
1
9
(JP7) (JP14)
6
6
2
2
COM 2
1
1
SATA 1
(JP13)
(JP6)
1
6
6
1
1
(JP5)
(JP12)
6
6
1
4
1
4
1
2
10
1
COM 1
System
COM 1
Fan 2
1
9
16
6
6
4-pin DC-out
JP2
JP3
VGA
1
2
1
2
1
J22
6
1
2
J21
PCIe x16 (PCIE1)
2
1
PCIe x4 (PCIE2)
Corporation to facilitate the industry's transition
®
Pin
2
4
6
8
10
12
14
Chapter 5
14
13
LPC
1
2
Low
®
Pin Assignment
L_AD1
L_AD0
3V3
GND
Key
GND
5V
28
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