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Document type:
Title:
User's Manual (MUT)
Mod. V1495 General Purpose VME Board
5.2.2.
COIN_REFERENCE Design
The COIN_REFERENCE design VHDL entity is the interface to the V1495HAL. If the
User wishes to use V1495HAL to develop his own application on the V1495 platform, the
VHDL entity must not be modified: this means that signals names and function of the
COIN_REFERENCE entity must be used, as shown in the following table:
PORT NAME
NLBRES
LCLK
REG_WREN
REG_RDEN
REG_ADDR
REG_DIN
REG_DOUT
USR_ACCESS
A_DIN
B_DIN
C_DOUT
G_LEV
G_DIR
G_DOUT
G_DIN
D_IDCODE
D_LEV
NPO:
00117/04:V1495.MUTx/08
Table 5.1: COIN_REFERENCE signals
DIRECTION
IN
1
IN
1
REGISTER INTERFACE
IN
1
IN
1
IN
16
IN
16
OUT
16
IN
1
V1495 Front Panel Ports (PORT A,B,C,G) INTERFACE
IN
32
IN
32
OUT
32
OUT
1
OUT
1
OUT
2
IN
2
V1495 Mezzanine Expansion Ports (PORT D,E,F) INTERFACE
IN
3
OUT
1
Filename:
V1495_REV8.DOC
Revision date:
12/02/2010
WIDTH
GLOBAL SIGNALS
Revision:
8
DESCRIPTION
Async Reset (active low)
Local Bus Clock (40 MHz)
Write pulse (active high)
Read pulse (active high)
Register address
Data from CAEN Local Bus
Data to CAEN Local Bus
Current
register
access
at user address space(Active high)
In A (32 x LVDS/ECL)
In B (32 x LVDS/ECL)
Out C (32 x LVDS)
Output Level Select (0=>TTL; 1=>
NIM)
Output Enable (0=>Output, 1=>Input)
Out G - LEMO (2 x NIM/TTL)
In G – LEMO (2 x NIM/TTL)
D slot mezzanine Identifier
D slot Port Signal Level Select
(the level selection depends on the
mezzanine expansion board mounted
onto this port)
Number of pages:
Page:
42
23
is
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