Fig. 5.2: Front Panel Ports Interface Diagram - Caen V1495 Technical Information Manual

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Table of Contents

Document type:

Title:

User's Manual (MUT)

Mod. V1495 General Purpose VME Board

In I/O Register Mode, C port is directly driven by the C_CONTROL register. The

coincidence is anyway still active so that a pulse in generated on G port when a

coincidence event is detected.

In Coincidence Mode, the C port is used to report the coincidence operator on A and B

port. In this case the C port can be masked through a mask register (C_MASK).

A gate pulse is generated on G port when data patterns on input ports A and B satisfy a

trigger condition.

The trigger condition implemented in this reference design is true when a bit-per-bit logic

operation on port A and B

is true. The logic operator applied to Port A and B is selectable by means of a register bit

(MODE Register Bit 4).

If MODE bit 4 is set to '0', an AND logic operation is applied to corresponding bits in Port

A and B (i.e. A(0) AND B(0), A(1) AND B(1) etc.).

In this case, a trigger is generated if corresponding A and B port bits are '1' at the same

time.

If MODE bit 4 is set to '1', an OR logic operation is applied to corresponding bits in Port A

and B (i.e. A(0) OR B(0), A(1) OR B(1) etc.).

In this case, a trigger is generated if there is a '1' on one bit of either port A or B.

Port A and B bits can be singularly masked through a register, so that a '1' on that bit

doesn't generate any trigger.

Expansion mezzanine cards can be directly controlled through registers already

implemented in this design.

The expansion mezzanine is identified by a unique identification code that can be read

through a register.

PORT A

A_MASK

A_DIN

A_STATUS

B_DIN

B_STATUS

B_MASK

PORT B

READ ONLY REG

WRITE ONLY REG

NPO:

00117/04:V1495.MUTx/08

OPERATOR

C_STATUS

AND

COINCIDENCE

LOGIC

DELAY_SEL

GATEWIDTH