Document type:
Title:
User's Manual (MUT)
Mod. V1495 General Purpose VME Board
5. V1495 USER FPGA Reference Design Kit
5.1. Introduction
The CAEN V1495 board provides a user-customizable FPGA (called USER FPGA).
The COIN_REFERENCE reference design illustrates how to use the USER FPGA to
implement a Coincidence Unit & I/O Register Unit. This design can be customised by the
user in order to adapt its functionality to his own needs.
Port A (32 IN ECL/LVDS)
5.2. Design Kit
5.2.1.
V1495HAL
The V1495 Hardware Abstraction Layer (V1495HAL) is a HDL module provided, in
Verilog format at netlist level, in order to help the hardware interfacing.
NPO:
00117/04:V1495.MUTx/08
ON-BOARD DELAY LINES
HARDWARE ABSTRACTION LAYER
USER-DEFINED
LOGIC
Port B (32 IN ECL/LVDS)
Fig. 5.1: USER FPGA block diagram
Filename:
V1495_REV8.DOC
Revision date:
12/02/2010
Port C (32 OUT LVDS)
Number of pages:
42
Revision:
8
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