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Figure 7-10Connection via a Two–Wire Circuit (6ES5 470–8MB11, 6ES5 470–8MC11)
Analog Value Re-
Table 7-14 shows how the analog output value has to be stored in the process
presentation of
image output table (PIQ).
Analog Output Mo-
Tables 7-15 and 7-16 show the voltage and currents assigned to the bit pat-
dules
terns.
Table 7-14
Representation of an Analog Output Value as a Bit Pattern
Bit Number
7
Analog Value Represent. VZ 2
X:
Irrelevant bits
ET 200U Distributed I/O Station
EWA 4NEB 812 6087–02b
1
3
2
L+ M
DC 24 V
QI
(4/8)
R
Key:
QI:
Analog Output "Current"
M
: Chassis Ground Terminal of the Analog Unit
ANA
R
:
Load Resistor
L
High Byte
6
5
4
3
2
1
10
9
8
7
6
5
2
2
2
2
2
Analog Value Processing
5
7
9
4
6
8
10
M
ANA
(6/10)
L
Low Byte
0
7
6
5
4
3
4
3
2
1
0
2
2
2
2
2
X
2
1
0
X
X
X
7-27
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