Toshiba TMP91C824F Data Book page 83

16bit microcontroller tlcs-900/l1 series
Table of Contents

Advertisement

(2) Memory Address Mask Registers
Figure 3.6.3 shows the Memory Address Mask Registers. Memory address mask registers
MAMR0 to MAMR3 are used to set the size of the CS0 to CS3 areas by specifying a mask for each
bit of the start address set in memory start address registers MAMR0 to MAMR3. The compare
operation used to determine if an address is in the CS0 to CS3 areas is only performed for bus
address bits corresponding to bits set to "0" in these registers. Also, the address bits that can be
masked by MAMR0 to MAMR3 differ between CS0 to CS3 areas. Accordingly, the size that can be
each area is different.
MAMR0
bit Symbol
(00C9H)
Read/Write
After Reset
Function
Range of possible settings for CS0 area size: 256 bytes to 2 Mbytes
MAMR1
bit Symbol
(00CBH)
Read/Write
After Reset
Function
Range of possible settings for CS1 area size: 256 bytes to 4M bytes.
MAMR2
MAMR3
bit Symbol
(00CDH)
(00CFH)
Read/Write
After reset
Function
Range of possible settings for CS2 and CS3 area sizes: 32 Kbytes to 8 Mbytes.
Memory address mask register (for CS0 area)
7
6
5
V20
V19
V18
1
1
1
Sets size of CS0 area
Memory address mask register (CS1)
7
6
5
V21
V20
V19
1
1
1
Sets size of CS1 area
Memory address mask register (CS2, CS3)
7
6
5
V22
V21
V20
1
1
1
Sets size of CS2 or CS3 area
Figure 3.6.3 Memory Address mask Registers
91C824-80
4
3
2
V17
V16
V15
R/W
1
1
1
0: used for address compare
4
3
2
V18
V17
V16
R/W
1
1
1
0: Used for address compare
4
3
2
V19
V18
V17
R/W
1
1
1
0: used for address compare
TMP91C824
1
0
V14 to 9
V8
1
1
1
0
V15 to 9
V8
1
1
1
0
V16
V15
1
1

Advertisement

Table of Contents
loading

Table of Contents