Toshiba TMP91C824F Data Book page 60

P1 P0
bit Symbol
(0001H) (0000H)
Read/Write
After Reset
P1CR
bit Symbol P17C
(0004H)
Read/Write
After Reset
Function
P2
bit Symbol
(0006H)
Read/Write
After Reset
P2FC
bit Symbol P27F
(0009H)
Read/Write
After Reset
Function
(note): Read-modify-write is prohibited for P1CR and P2FC.
7 6 5
P17 P16 P15
Input mode (Output latch register is cleared to 0.)
Port 1 Control Register
7 6 5
P16C P15C
0 0 0
7 6 5
P27 P26 P25
Port 2 Function Register
7 6 5
P26F P25F
1 1 1
0: Port 1: Address bus (A23 to A16)
Figure 3.5.3 Registers for Ports 1 and 2
Port 1 Register
4 3
P14 P13
R/W
4 3
P14C P13C
W
0 0
0: IN 1: OUT
Port 2 Register
4 3
P24 P23
R/W
Output latch register is set to "1"
4 3
P24F P23F
W
1 1
91C824-57
TMP91C824
2 1 0
P12 P11 P10
2 1 0
P12C P11C P10C
0 0 0
Port 1 I/O setting
0: Input
1: Output
2 1 0
P22 P21 P20
2 1 0
P22F P21F P20F
1 1 1