Toshiba TMP91C824F Data Book page 15

3.3 Triple Clock Function and Standby Function
TMP91C824 contains (1) a clock gear, (2) clock doubler (DFM), (3) stand-by controller and (4)
noise-reduction circuit. It is used for low-power, low-noise systems.
This chapter is organized as follows:
3.3.1 Block diagram of system clock
3.3.2 SFRs
3.3.3 System clock controller
3.3.4 Prescaler clock controller
3.3.5 Clock doubler (DFM)
3.3.6 Noise-reducing circuit
3.3.7 Stand-by controller
91C824-12
TMP91C824