Toshiba TMP91C824F Data Book page 180

16bit microcontroller tlcs-900/l1 series
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<SIOS>
<SIOF>
<SEF>
SCK pin (output)
SI pin
INTS2 interrupt
request
SBI0DBR
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8-Bit Transmit/Receive Mode
Set a control register to a transmit/receive mode and write data to SBI0DBR. After the data has
been written, set SBI0CR<SIOS> to "1" to start transmitting/receiving. When data is transmitted,
the data is output via the SO pin, starting from the least significant bit (LSB) and synchronized with
the leading edge of the serial clock signal. When data is received, the data is input via the SI pin on
the trailing edge of the serial clock signal. 8-bit data is transferred from the Shift Register to
SBI0DBR and an INTS2 interrupt request is generated. The interrupt service program reads the
received data from the data buffer register and writes the data which is to be transmitted. SBI0DBR
is used for both transmitting and receiving. Transmitted data should always be written after received
data has been read.
When an internal clock is used, the automatic wait function will be in effect until the received data
has been read and the next data has been written.
When an external clock is used, since the shift operation is synchronized with the external clock,
received data is read and transmitted data is written before a new shift operation is executed. The
maximum transfer speed when an external clock is used is determined by the delay time between the
time when an interrupt request is generated and the time at which received data is read and
transmitted data is written.
When the transmit is started, after the SBI0SR<SIOF> goes "1" output from the SO pin holds final
bit of the last data until falling edge of the SCK.
Transmitting/receiving data ends when <SIOS> is cleared to "0" by the INTS2 interrupt service
program or when SBI0CR1<SIOINH> is set to "1". When <SIOS> is cleared to "0", received data
is transferred to SBI0DBR in complete blocks. The transmit/receive mode ends when the transfer is
complete. In order to confirm whether data is being transmitted/received properly by the program,
set SBI0SR to be sensed. <SIOF> is set to "0" when transmitting/receiving has been completed.
When <SIOINH> is set to 1, data transmitting/receiving stops. <SIOF> is then cleared to 0.
Note: When the transfer mode is changed, the contents of SBI0DBR will be lost. If the mode must
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Figure 3.10.28 Receiver Mode (example: Internal clock)
be changed, conclude data transmitting/receiving by clearing <SIOS> to "0", read the last
data, then change the transfer mode.
91C824-177
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0
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Read receiver data
TMP91C824
Clear <SIOS>
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Read receiver data

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