Table B–1
(3SL150) development board.
Table B–1. HSMC Port A Interface Pin-Out Information (Part 1 of 3)
Data Conversion HSMC Schematic
Board
Reference
(J1)
Description
33
Management serial data
34
Management serial clock
41
Dedicated CMOS I/O bit 0
42
Dedicated CMOS I/O bit 1
43
Dedicated CMOS I/O bit 2
44
Dedicated CMOS I/O bit 3
47
LVDS TX or CMOS I/O bit 0
48
LVDS RX or CMOS I/O bit 0
49
LVDS TX or CMOS I/O bit 0
50
LVDS RX or CMOS I/O bit 0
53
LVDS TX or CMOS I/O bit 1
54
LVDS RX or CMOS I/O bit 1
55
LVDS TX or CMOS I/O bit 1
56
LVDS RX or CMOS I/O bit 1
59
LVDS TX or CMOS I/O bit 2
60
LVDS RX or CMOS I/O bit 2
61
LVDS TX or CMOS I/O bit 2
62
LVDS RX or CMOS I/O bit 2
65
LVDS TX or CMOS I/O bit 3
66
LVDS RX or CMOS I/O bit 3
67
LVDS TX or CMOS I/O bit 3
68
LVDS RX or CMOS I/O bit 3
71
LVDS TX or CMOS I/O bit 4
72
LVDS RX or CMOS I/O bit 4
73
LVDS TX or CMOS I/O bit 4
74
LVDS RX or CMOS I/O bit 4
77
LVDS TX or CMOS I/O bit 5
78
LVDS RX or CMOS I/O bit 5
79
LVDS TX or CMOS I/O bit 5
80
LVDS RX or CMOS I/O bit 5
© November 2008 Altera Corporation
B. Pin-Out Information for the Stratix III
provides the HSMC Port A interface pin-out information for the Stratix III
Schematic
Signal Name
SDA
SCL
ADA_D13
ADB_D13
ADA_D12
ADB_D12
ADA_D11
ADB_D11
ADA_D10
ADB_D10
ADA_D9
ADB_D9
ADA_D8
ADB_D8
ADA_D7
ADB_D7
ADA_D6
ADB_D6
ADA_D5
ADB_D5
ADA_D4
ADB_D4
ADA_D3
ADB_D3
ADA_D2
ADB_D2
ADA_D1
ADB_D1
ADA_D0
ADB_D0
(3SL150) Development Board
Development Board Schematic
Schematic
Signal Name
HSMA_SDA
HSMA_SCL
HSMA_D0
HSMA_D1
HSMA_D2
HSMA_D3
LVDS or 2.5 V
HSMA_TX_P0
LVDS or 2.5 V
HSMA_RX_P0
LVDS or 2.5 V
HSMA_TX_N0
LVDS or 2.5 V
HSMA_RX_N0
LVDS or 2.5 V
HSMA_TX_P1
LVDS or 2.5 V
HSMA_RX_P1
LVDS or 2.5 V
HSMA_TX_N1
LVDS or 2.5 V
HSMA_RX_N1
LVDS or 2.5 V
HSMA_TX_P2
LVDS or 2.5 V
HSMA_RX_P2
LVDS or 2.5 V
HSMA_TX_N2
LVDS or 2.5 V
HSMA_RX_N2
LVDS or 2.5 V
HSMA_TX_P3
LVDS or 2.5 V
HSMA_RX_P3
LVDS or 2.5 V
HSMA_TX_N3
LVDS or 2.5 V
HSMA_RX_N3
LVDS or 2.5 V
HSMA_TX_P4
LVDS or 2.5 V
HSMA_RX_P4
LVDS or 2.5 V
HSMA_TX_N4
LVDS or 2.5 V
HSMA_RX_N4
LVDS or 2.5 V
HSMA_TX_P5
LVDS or 2.5 V
HSMA_RX_P5
HSMA_TX_N5
LVDS or 2.5 V
LVDS or 2.5 V
HSMA_RX_N5
Data Conversion HSMC Reference Manual
Stratix III
Pin
I/O Standard
Number
2.5 V
P8
2.5 V
AA32
2.5 V
AK9
2.5 V
AJ9
2.5 V
AL7
2.5 V
AL9
AC11
AJ4
AB10
AJ3
AC9
AG4
AC8
AG3
AH5
AM2
AH4
AM1
AE8
AL2
AE7
AL1
AF6
AJ2
AF5
AK1
AD7
AH2
AD6
AJ1