Table 34: Detailed Description Of Memory Segments - Siemens ERTEC200 Manual

Segment Contents
5 ARM-ICU
6 Not used
7 EMIF-Register
8 DMA-Register
9 - 15 Not used

Table 34: Detailed Description of Memory Segments

Note:
1. Access to IRT registers and KRAM should only occur in the address areas indicated above (first 2 Mbytes). An access to areas
within the 2 Mbytes that are not occupied by the IRT registers and KRAM result in undefined access (acknowledgement timeout). The
read or written data are not valid. While the 2-Mbyte areas are mirrored within the 8-Mbyte physical address area, different access types
are used:
2-4-Mbyte area for unaligned consistent 16-bit accesses to IRT
4-6-Mbyte area for unaligned consistent 32-bit accesses to IRT
6-8 Mbytes is not supported (supplies undefined values)
The 8-Mbyte address area is mirrored 32 times within the 256 Mbytes.
2. Memory areas are mirrored according to the following formula:
N = --------------------------------------------
Physical memory size
Physical memory size is limited to values of 2
Example: The physical memory size of the watchdog is 28 bytes. However, 32 bytes are taken for calculating the number of mirrorings
N. In this case, the number of mirrorings N = 8. Access to the 4 unused bytes does not result in an acknowledgement timeout, but the
read or written values are undefined.
Copyright © Siemens AG 2007. All rights reserved.
Technical data subject to change
Größe
256 MB
256 MB
256 MB
256 MB
1,75 GB
Memory size
n
(2, 4, 8, ... 128, 256 etc.)
Adressbereich
ARM – Interrupt-Controller
5000_0000-
128 Byte physical
5FFF_FFFF
Note2
6000_0000-
6FFF_FFFF
Steuer-Register for external Memory-Interface
7000_0000-
64 Byte physical
7FFF_FFFF
Note2
DMA-Controller
8000_0000-
16 Byte physikalisch
FFFF_FFFF
Note2
9000_0000-
FFFF_FFFF
93
Beschreibung
ERTEC 200 Manual
Version 1.1.0