ADLINK Technology CoreModule 740 Reference Manual page 4

Contents
Chapter 4 BIOS Setup .............................................................................................................. 31
Introduction.................................................................................................................................... 31
Entering BIOS Setup (VGA Display) ........................................................................................ 31
Entering BIOS Setup (Remote Access) .................................................................................. 31
PCI-ISA Bridge Mapping ............................................................................................................... 32
OEM Logo Utility ........................................................................................................................... 32
Logo Image Requirements....................................................................................................... 32
Appendix A Technical Support .................................................................................................. 33
Appendix B I/O Interface Board Description............................................................................. 35
Overview ....................................................................................................................................... 35
I/O Interface Board Layout ....................................................................................................... 35
I/O Interface Board Connectors and Headers ............................................................................... 36
Index .................................................................................................................................................. 41
List of Figures
Figure 2-1. Stacking PC/104-Plus Modules with the CoreModule 740 ...................................... 4
Figure 2-2. Functional Block Diagram ....................................................................................... 6
Figure 2-3. Component Locations (Top-Side View)................................................................... 8
Figure 2-4. Component Locations (Bottom-Side View) ............................................................. 8
Figure 2-5. Connector Pin Identifications................................................................................... 9
Figure 2-6. Header and Connector Locations (Top-Side View) ............................................... 10
Figure 2-7. Header and Connector Locations (Bottom-Side View).......................................... 10
Figure 2-8. Jumper Header Locations (Top-Side View) .......................................................... 11
Figure 2-9. Mechanical Overview (Top-Side View) ................................................................. 12
Figure 3-1. Oops! Jumper Serial Port (DB9)............................................................................ 28
Figure 3-2. Serial Console Jumper .......................................................................................... 28
Figure B-1. I/O Interface Board Connectors (Top view) ........................................................... 35
List of Tables
Table 2-1. Major Component Descriptions and Functions ....................................................... 7
Table 2-2. Module Header and Connector Descriptions .......................................................... 9
Table 2-3. Jumper Settings .................................................................................................... 11
Table 2-4. Weight and Footprint Dimensions ......................................................................... 11
Table 2-5. Power Supply Requirements ................................................................................. 13
Table 2-6. Environmental Requirements ................................................................................ 13
Table 3-1. Interrupt Channel Assignments ............................................................................. 16
Table 3-2. Memory Map ......................................................................................................... 17
Table 3-3. I/O Address Map ................................................................................................... 17
Table 3-4. Utility 1 Interface Pin Signals (J5) ........................................................................ 20
Table 3-5. Utility 2 Interface Pin Signals (J4) ........................................................................ 23
Table 3-6. Video Interface Pin Signals (J10) .......................................................................... 26
Table 3-7. Optional System Fan Pin Signals (J6) .................................................................. 27
Table 3-8. Power Interface Pin Signals (J7) ........................................................................... 27
Table A-1. Technical Support Contact Information ................................................................. 33
Table B-1. Utility 1 Interface Pin Signals (J1) ......................................................................... 36
Table B-2. Utility 2 Interface Pin Signals (J2) ......................................................................... 38
Table B-3. Auxiliary Battery Interface Pin Signals (J10) ......................................................... 39
Table B-4. Auxiliary Power Pin Signals (J11) ......................................................................... 40
iv Reference Manual CoreModule 740