JVC GY-DV5000U Service Manual page 121

SN74LV138ADGV-X [TEXAS INSTRUMENTS]
(1 OF 8 Decoders/Demultiplexers)
SN74LV165ADGV-X [TEXAS INSTRUMENTS]
(8-Bit Serial or Parallel-In/Serial Out Shift Registers)
FUNCTION TABLE
SH/LD V
1 16
CC
INPUTS
CLK CLK INH
2 15
SH/ LD CLK CLK INH
E D
3 14
L X X
F C
4 13
H H X
G B
5 12
H X H
H A
6 11
H L
Q SER
7 10
H
H L
GND Q
8 9
H
(TOP VIEW)
Logic diagram (positive logic)
A B C D E F
11 12 13 14 3 4
1
SH/LD
15
CLK INH
2
CLK
S S S S S S
C1 C1 C1 C1 C1
10
1D 1D 1D 1D 1D 1D
SER
R R R R R R
TC7W34FU-X [TOSHIBA]
(Triple NON-Invert Buffer)
TC4053BF-W [TOSHIBA]
(Triple 2-Channel Multiplexer/Demultiplexer)
BLOCK DIAGRAM
TC4051BF-X [TOSHIBA]
(Single 8-Channel Multiplexer/Demultiplexer)
BLOCK DIAGRAM
(TOP VIEW)
OPERATION OPERATION
Parallel load
Q 0
Q 0
Shift
Shift
TC7SH00FU-X [TOSHIBA]
(2-Input NAND Gate)
G H
5 6
9
S S
Q H
C1 C1 C1
7
1D 1D Q H
R R
TC4S66F-X [TOSHIBA]
(Analog Switch)
TC7W00FU-X [TOSHIBA]
(2 Input Dual NAND Gate)
TC7WH245FU-X [TOSHIBA]
(Dual Bus Transceiver)
4-53 4-53
TC7W08FU-X [TOSHIBA]
(2 Input Dual AND Gate)
TC7W14FU-X [TOSHIBA]
(Schmitt Trigger Triple Inverte Gate)
(Top view)