Register Description - Nvm Controller - Atmel AVR XMEGA AU series Manual

4.15 Register Description – NVM Controller
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4.15.1 ADDR0 Address register 0
4.15.2 ADDR1 – Address register 1
4.15.3 ADDR2 – Address register 2
4.15.4 DATA0 – Data register 0
8331B–AVR–03/12
The ADDR0, ADDR1, and ADDR2 registers represent the 24-bit value ADDR. This is used for
addressing all NVM sections for read, write, and CRC operations.
Bit 7
+0x00
Read/Write R/W
Initial Value 1
• Bit 7:0 – ADDR[7:0]: Address Register Byte 0
This register gives the address low byte when accessing NVM locations.
Bit 7
+0x01
Read/Write R/W
Initial Value 0
• Bit 7:0 – ADDR[15:8]: Address Register Byte 1
This register gives the address high byte when accessing NVM locations.
Bit 7
+0x02
Read/Write R/W
Initial Value 0
• Bit 7:0 – ADDR[23:16]: Address Register Byte 2
This register gives the address extended byte when accessing NVM locations.
The DATA0, DATA1, and DATA registers represent the 24-bit value DATA. This holds data dur-
ing NVM read, write, and CRC access.
Bit 7
+0x04
Read/Write R/W
Initial Value 0
• Bit 7:0 – DATA[7:0]: Data Register Byte 0
This register gives the data value byte 0 when accessing NVM locations.
6 5 4
ADDR[7:0]
R/W R/W R/W
1 1 1
6 5 4
ADDR[15:8]
R/W R/W R/W
0 0 0
6 5 4
ADDR[23:16]
R/W R/W R/W
0 0 0
6 5 4
DATA[7:0]
R/W R/W R/W
0 0 0
Atmel AVR XMEGA AU
3 2 1
R/W R/W R/W
1 1 1
3 2 1
R/W R/W R/W
0 0 0
3 2 1
R/W R/W R/W
0 0 0
3 2 1
R/W R/W R/W
0 0 0
0
ADDR0
R/W
1
0
ADDR1
R/W
0
0
ADDR2
R/W
0
0
DATA0
R/W
0
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