Atmel AVR XMEGA AU series Manual page 371

8331B–AVR–03/12
Table 28-2. Gain stage impedance mode.
IMPMODE Group Configuration
0 HIGHIMP
1 LOWIMP
• Bit 6:5 – CURRLIMIT[1:0]: Current Limitation
These bits can be used to limit the current consumption of the ADC by reducing the maximum
ADC sample rate. The available settings are shown in
current limitations are nominal values. Refer to the device datasheet for actual current limitation
for each setting.
Table 28-3. ADC current limitations.
CURRLIMIT[1:0]
00
01
10
11
• Bit 4 – CONVMODE: Conversion Mode
This bit controls whether the ADC will work in signed or unsigned mode. By default, this bit is
cleared and the ADC is configured for unsigned mode. When this bit is set, the ADC is config-
ured for signed mode.
• Bit 3 – FREERUN: Free Running Mode
When the bit is set to one, the ADC is in free running mode and the ADC channels defined in the
EVCTRL register are swept repeatedly.
• Bit 2:1 – RESOLUTION[1:0]: Conversion Result Resolution
These bits define whether the ADC completes the conversion at 12- or 8-bit result resolution.
They also define whether the 12-bit result is left or right adjusted within the 16-bit result regis-
ters. See Table 28-4 on page 371
Table 28-4. ADC conversion result resolution.
RESOLUTION[1:0]
00
01
10
11
• Bit 0 - Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write
this bit to zero when this register is written.
Description
For high-impedance sources; charge will remain on input
For low impedance sources
Group Configuration Description
NO No limit
LOW Low current limit, max. sampling rate 1.5MSPS
MED Medium current limit, max. sampling rate 1MSPS
HIGH High current limit, max. sampling rate 0.5MSPS
for possible settings.
Group Configuration Description
12BIT 12-bit result, right adjusted
Reserved
8BIT 8-bit result, right adjusted
LEFT12BIT 12-bit result, left adjusted
Atmel AVR XMEGA AU
Table 28-3 on page 371. The indicated
371