Atmel AVR XMEGA AU series Manual page 102

7.11.3 CALB – DFLL Calibration register B
7.11.4 COMP1 – DFLL Compare register Byte 1
8331B–AVR–03/12
• Bit 7 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write
this bit to zero when this register is written.
• Bit 6:0 – CALA[6:0]: DFLL Calibration Bits
These bits hold the part of the oscillator calibration value that is used for automatic runtime cali-
bration. A factory-calibrated value is loaded from the signature row of the device and written to
this register during reset, giving an oscillator frequency approximate to the nominal frequency for
the oscillator. The bits cannot be written when the DFLL is enabled.
Bit 7 6
+0x03 – –
Read/Write R/W R/W
Initial Value 0 0
• Bit 7:6 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 5:0 – CALB[5:0]: DFLL Calibration bits
These bits hold the part of the oscillator calibration value that is used to select the oscillator fre-
quency. A factory-calibrated value is loaded from the signature row of the device and written to
this register during reset, giving an oscillator frequency approximate to the nominal frequency for
the oscillator. These bits are not changed during automatic run-time calibration of the oscillator.
The bits cannot be written when the DFLL is enabled. When calibrating to a frequency different
from the default, the CALA bits should be set to a middle value to maximize the range for the
DFLL.
The COMP1 and COMP2 register pair represent the frequency ratio between the oscillator and
the reference clock. The initial value for these registers is the ratio between the internal oscillator
frequency and a 1.024kHz reference.
Bit 7 6
+0x05
Read/Write R/W R/W
Initial Value 0 0
• Bit 7:0 – COMP1[7:0]: Compare Register Byte 1
These bits hold byte 1 of the 16-bit compare register.
Atmel AVR XMEGA AU
5 4 3
CALB[5:0]
R/W R/W R/W
x x x
5 4 3
COMP[7:0]
R/W R/W R/W
0 0 0
2 1 0
R/W R/W R/W
x x x
2 1 0
R/W R/W R/W
0 0 0
CALB
COMP1
102