GE N60 Instruction Manual page 428

CONTROL ELEMENTS
BIT COMP 1 ARG B0
representation of the second argument, B, of the comparator. The
significant bit, while the
the sign bit (asserted for negative values). In other words the following convention is used:
8BIT COMP 1 INPUT MODE
threshold. This setting applies to the effective operating signal (that is, either A – B or A + B) and not to the individual inputs.
The following figure illustrates an effective operating characteristic resulting from this setting.
The
8BIT COMP 1 Out
without reference to this setting.
8BIT COMP 1 DIRECTION
below ("Under") the threshold as illustrated in the following figure.
5
8BIT COMP 1 ADD/SUB
operating signal. If the FlexLogic operand configured under this setting is logic 0 ("Off"), then the operating signal is A – B. If
the FlexLogic operand configured under this setting is logic 1 ("On"), then the operating signal is A + B. The element
switches between adding and subtracting instantly, without additional delay.
8BIT COMP 1 PICKUP
via the
8BIT COMP 1 SCALE FACTOR
8BIT COMP 1 HYSTERESIS
If
8BIT COMP 1 DIRECTION
If
8BIT COMP1 DIRECTION
8BIT COMP 1 PICKUP DELAY
8BIT COMP 1 RESET DELAY
8BIT COMP 1 SCALE FACTOR
The same scaling factor applies to all three actual values:
enables easier application, testing, and troubleshooting. Also, it facilitates telemetry applications.
8BIT COMP 1 BLOCK
conditions. When the blocking input is asserted, the element resets its timers, de-asserts the
operands (if asserted), clears self-reset targets, logs a 'blocked' event if Events are enabled, and becomes
COMP1 OP
inactive. When unblocked, the element starts operating instantly. If exposed to pickup conditions for an extended period of
time and unblocked, the element picks up and starts timing out at the moment of unblocking.
5-268
to — These settings specify FlexLogic operands that provide an eight-bit
8BIT COMP 1 ARG B7
setting represents the most significant bit. The
8BIT COMP 1 ARG B6
— This setting specifies whether a signed or absolute value is used for comparison with the pickup
actual value, as well as the
— This setting specifies if the element operates if the effective operating signal is above ("Over") or
Figure 5-146: Operating characteristics of the eight-bit comparator
— This setting specifies if the two arguments, A and B, are added or subtracted to form the effective
— This setting specifies the pickup threshold for the comparator. This setting applies to the value scaled
setting.
— Specifies the width of hysteresis for the comparator. The following logic applies:
= "Over", then Dropout :=
= "Under", then Dropout :=
— Specifies a pickup time delay for the
— Specifies a reset time delay for the
— This setting allows re-scaling the two input arguments and the effective operating quantity.
— This setting specifies a FlexLogic operand for blocking the feature based on user-programmable
N60 NETWORK STABILITY AND SYNCHROPHASOR MEASUREMENT SYSTEM – INSTRUCTION MANUAL
8BIT COMP 1 ARG B0
through
8BIT COMP1 BIT0 8BIT COMP1 BIT7
–
8BIT COMP 1 PICKUP 8BIT COMP 1 HYSTERESIS
+
8BIT COMP 1 PICKUP
8BIT COMP 1 OP
8BIT COMP 1 OP
,
8BIT COMP 1 A 8BIT COMP 1 B
CHAPTER 5: SETTINGS
setting represents the least
8BIT COMP 1 ARG B7
FlexLogic operands, are derived
8BIT COMP 1 HYSTERESIS
FlexLogic operand.
FlexLogic operand.
and
8BIT COMP 1 Out
8BIT COMP 1 PKP
setting is
Eq. 5-33
. The scaling
and
8BIT