Omron CP1L-EL20DR-D Operation Manual page 385

Sysmac cp series cp1l-el/em cpu unit
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Inverter Positioning
Word
Bits
Function
A36
07
Error Counter Alarm
Flag
08 to 14 Not used.
15
Inverter Positioning
Output Value Sign
Flag
A272 00 to 15 Lower 4 digits of the
present value of the
internal pulse output
(absolute value for
absolute coordi-
nates)
A273 00 to 15 Upper 4 digits of the
present value of the
internal pulse output
(absolute value for
absolute coordi-
nates)
Word
Bits
Function
A32
00 to 15 Error counter 0
present value
(signed)
A38
00 to 15 Lower 4 digits of
present value of
pulse output to
inverter (relative
value)
A39
00 to 15 Upper 4 digits of
present value of
pulse output to
inverter (relative
value)
Data range
ON: Error counter
Turned ON at following times:
alarm
• When pulse output to error counter is
OFF: No error
stopped and absolute value of error
counter alarm
counter present value is greater than
or equal to error counter alarm detec-
tion value
Turned OFF at following times:
• When error counter alarm is reset
• When power to CPU Unit is turned ON
• When CPU Unit operation starts
• When CPU Unit operation stops
ON:
Turned ON at following times:
OFF:
• When signed output value is between
0000 0000 and 7FFF FFFF hex.
Turned OFF at following times:
• When signed output value is between
FFFF FFFF and 8000 0000 hex.
8000 0000 to 7FFF
Contains absolute movement value
FFFF hex
when pulses are output to error
(−2,147,483,648 to
counter.
2,147,483,647)
Cleared to zero at following times:
• When power to CPU Unit is turned ON
• When operation is started
Updated at following times:
• Cyclically on error counter cycle
Use the following for the present values of the internal pulse and error counter
of inverter positioning.
Data range
8000 to 7FFF hex
Cleared to zero at following times:
(−32,768 to
• When power to CPU Unit is turned ON
32,767)
• At start of operation
• When an error counter error occurs
Updated at following times:
• Cyclically according to error counter
cycle
Saved at following times:
• When Error Counter Disable Bit
(A562.01) is turned ON.
8000 0000 to 7FFF
Contains relative internal pulse output
FFFF hex
value when pulses are output to error
(−2,147,483,648 to
counter.
2,147,483,647)
Cleared to zero at following times:
• When power to CPU Unit is turned ON
• When operation is started
• When pulse output to error counter is
started
Updated at following times:
• Cyclically on error counter cycle
Refresh timing
Refresh timing
Section 7-3
Application
examples
This flag can be
used to provide
notification of
excessive pulses in
the error counter,
e.g., when encoder
wiring breaks dur-
ing positioning.
This flag can be
used as a direction
signal.
This value can be
used to monitor the
present value of
the internal pulse
output as an abso-
lute value when
using absolute
coordinates.
Application
examples
Use to monitor the
difference between
the target value
and the present
value.
These values can
be used to monitor
the present value
of internal pulse
output.
351

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