Tr (Temporary Relay) Area - Omron CP1L-EL20DR-D Operation Manual

Sysmac cp series cp1l-el/em cpu unit
Table of Contents

Advertisement

TR (Temporary Relay) Area

4-8
TR (Temporary Relay) Area
Forcing Bit Status
Examples
120
The TR Area contains 16 bits with addresses ranging from TR0 to TR15.
These temporarily store the ON/OFF status of an instruction block for branch-
ing and are used only with mnemonics. TR bits are useful when there are sev-
eral output branches and interlocks cannot be used.
The TR bits can be used as many times as required and in any order required
as long as the same TR bit is not used twice in the same instruction block.
TR bits can be used only with the OUT and LD instructions. OUT instructions
(OUT TR0 to OUT TR15) store the ON OFF status of a branch point and LD
instructions recall the stored ON OFF status of the branch point.
TR bits cannot be changed from the CX-Programmer.
In this example, a TR bit is used when two outputs have been directly con-
nected to a branch point.
0.00
0.01
In this example, a TR bit is used when an output is connected to a branch
point without a separate execution condition.
0.00
Note A TR bit is not required when there are no execution conditions after the
branch point or there is an execution condition only in the last line of the
instruction block.
0.00
0.00
TR0
0.02
0.03
0.04
0.05
0.01
0.02
TR0
0.03
0.01
0.02
0.01
0.02
0.03
Section 4-8
Instruction
Operand
0.00
LD
0.01
OR
OUT
TR 0
AND
0.02
0.03
OUT
LD
TR 0
AND
0.04
OUT
0.05
Operand
Instruction
LD
0.00
OUT
TR 0
AND
0.01
OUT
0.02
TR 0
LD
OUT
0.03
Instruction
Operand
0.00
LD
0.01
OUT
0.02
OUT
Instruction
Operand
0.00
LD
0.01
OUT
0.02
AND
0.03
OUT

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents