Pausing Input Signal Counting (Gate Function); Range Comparison - Omron CP1L-EL20DR-D Operation Manual

High-speed Counters
Target value 1
Target value 2

Range Comparison

High-speed counter PV
Comparison is executed
without regard to the
order of the ranges in
the table.
Interrupt task that is started.

Pausing Input Signal Counting (Gate Function)

234
Set the target values so that they do not occur at the peak or trough of count
value changes.
Match
Match not recognized.
The specified interrupt task is executed when the high-speed counter PV is
within the range defined by the upper and lower limit values.
• The comparison conditions (upper and lower limits of the range) are regis-
tered in the comparison table along with the corresponding interrupt task
number. The specified interrupt task will be executed once when the high-
speed counter PV is in the range (Lower limit ≤ PV ≤ Upper limit).
• A total of 8 ranges (upper and lower limits) are registered in the compari-
son table.
• The ranges can overlap.
• A different interrupt task can be registered for each range.
• The counter PV is compared with the 8 ranges once each cycle.
• The interrupt task is executed just once when the comparison condition
goes from unmet to met.
Restrictions
When more than one comparison condition is met in a cycle, the first interrupt
task in the table will be executed in that cycle. The next interrupt task in the
table will be executed in the next cycle.
Upper limit 1
Lower limit 1
Upper limit 2
Lower limit 2
No. 255 No. 000
Note The range comparison table can be used without starting an interrupt task
when the comparison condition is met. The range comparison function can be
useful when you just want to know whether or not the high-speed counter PV
is within a particular range.
Use the Range Comparison Condition Met Flags to determine whether the
high-speed counter PV is within a registered range.
If the High-speed Counter Gate Bit is turned ON, the corresponding high-
speed counter will not count even if pulse inputs are received and the counter
PV will be maintained at its current value. Bits A53108 to A53111 are the
High-speed Counter Gate Bits for high-speed counters 0 to 3.
Match
Target value 1
Target value 2
Match
Time
No. 000 No. 255
Section 7-1
Comparison table
Upper limit 1
Lower limit 1
Interrupt task = 000
Upper limit 2
Lower limit 2
Interrupt task = 255