Usb 3.0 Ports 0 And 1 (Cn25) - Aaeon GENE-APL5 User Manual

3.5" subcompact board
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3
GND
4
GND
5
BKL_ENABLE
* LVDS2 BKL_PWR can be set to +5V or +12V by JP7
* LVDS2 BKL_CONTROL can be set by JP8
2.5.25

USB 3.0 Ports 0 and 1 (CN25)

Pin
Pin Name
1
+5VSB
2
USB_D-
3
USB_D+
4
GND
5
USB_SSRX−
6
USB_SSRX+
7
GND
8
USB_SSTX−
9
USB_SSTX+
10
+5VSB
11
USB_D-
12
USB_D+
13
GND
14
USB_SSRX−
Chapter 2 – Hardware Information
GND
GND
OUT
18
17
16
15
14
Port 1
10
11 12 13
9
8
7
6
5
Port 0
1
2 3 4
Signal Type
PWR
DIFF
DIFF
GND
DIFF
DIFF
GND
DIFF
DIFF
PWR
DIFF
DIFF
GND
DIFF
+5V
Signal Level
+5V
+5V
43

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