Aaeon GENE-WHU6 User Manual

Aaeon GENE-WHU6 User Manual

3.5” subcompact board
Table of Contents

Advertisement

Quick Links

GENE-WHU6
3.5" Subcompact Board
st
User's Manual 1
Ed
Last Updated: March 20, 2020

Advertisement

Table of Contents
loading

Summary of Contents for Aaeon GENE-WHU6

  • Page 1 GENE-WHU6 3.5” Subcompact Board User’s Manual 1 Last Updated: March 20, 2020...
  • Page 2 AAEON assumes no liabilities resulting from errors or omissions in this document, or from the use of the information contained herein. AAEON reserves the right to make changes in the product design without notice to its users.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp. ⚫ Intel, Pentium, Celeron, and Xeon are registered trademarks of Intel Corporation ⚫ Core, Atom are trademarks of Intel Corporation ⚫...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity GENE-WHU6 with Heat-spreader If any of these items are missing or damaged, please contact your distributor or sales representative immediately. Preface...
  • Page 5 (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page at AAEON.com for the latest version of this document. Preface...
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Main Board/ Daughter Board/ Backplane 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Main Board/ Daughter Board/ Backplane Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...
  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................5 Dimensions ....................... 6 Jumpers and Connectors ..................10 List of Jumpers ......................11 2.3.1 Front Panel Connector (JP1) ................ 11 2.3.2 COM2 Pin8 Function Selection (JP3) ............
  • Page 12 2.4.13 LVDS Port (CN14) ..................25 2.4.14 USB 2.0 Port 5 (CN15) ................. 26 2.4.15 BIOS Debug Port (CN16) ................27 2.4.16 USB 2.0 Port 6 (CN17) ................. 28 2.4.17 LPC Port (CN18) .................... 28 2.4.18 Digital I/O Port (CN19) ................29 2.4.19 Nano SIM Card Socket (CN20) ..............
  • Page 13 3.4.4.1 Smart Fan Mode Configuration ............. 52 3.4.5 Advanced: SIO Configuration ..............56 3.4.5.1 Serial Port 1 Configuration .............. 57 3.4.5.2 Serial Port 2 Configuration ............. 58 3.4.6 Advanced: Power Management ............... 59 3.4.7 Advanced: Digital IO Port Configuration ..........60 Setup submenu: Chipset ..................
  • Page 14: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...
  • Page 15: Specifications

    Specifications System 3.5” Subcompact Board Form Factor Intel® 8th Generation Core™ i7/i5/i3/Celeron i7-8665UE (4 Cores, 1.7 GHz, up to 4.4 GHz) i5-8365UE (4 Cores, 1.6 GHz, up to 4.1 GHz) i3-8145UE (2 Cores, 2.2 GHz, up to 3.9 GHz) Celeron 4305UE (2 Cores, 2 GHz) Up to 4.4GHz CPU Frequency Generation Intel®...
  • Page 16 System -40°F ~ 176°F (-40°C ~ 80°C) Storage Temperature 0% ~ 90% relative humidity, non-condensing Operating Humidity MTBF (Hours) CE/FCC Certification Display VGA/LCD Controller Intel® 8th Generation Core™ i7/i5/i3/Celeron Video Output LVDS/eDP x 1 (Default: LVDS) VGA x 1 HDMI 2.0 x 1 Backlight inverter supply Intel®...
  • Page 17 Full size mSATA/mPCIe x 1 with NANO-SIM (mSATA as default, select by BIOS) M.2 2280 B-Key (PCIe as default, SATA select by BIOS) M.2 2230 E-Key x 1 (For WIFI/BT, PCIe/USB signal Expansion Slot only) SMBUS/I2C/LPC/eSPI x 1 8 Bit SIM Slot x 1 (NANO-SIM) —...
  • Page 18: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...
  • Page 19: Dimensions

    Dimensions Chapter 2 – Hardware Information...
  • Page 20 Part No. GENE-WHU6-FAN01 With Fan Option ( Chapter 2 – Hardware Information...
  • Page 21 With Heatsink Option (Part No. GENE-WHU6-HSK01) Chapter 2 – Hardware Information...
  • Page 22 With Heatsink Option (Part No. GENE-WHU6-HSK02) Chapter 2 – Hardware Information...
  • Page 23: Jumpers And Connectors

    Jumpers and Connectors Chapter 2 – Hardware Information...
  • Page 24: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function Front Panel Connector COM2 Pin8 Function Selection LVDS Port Backlight Inverter VCC Selection and Operating VDD Selection LVDS Port2 Backlight Lightness Control Mode Selection Touch Screen 4/5/8-wire Mode Selection Clear CMOS Jumper...
  • Page 25: Com2 Pin8 Function Selection (Jp3)

    2.3.2 COM2 Pin8 Function Selection (JP3) Ring (Default) +12V 2.3.3 LVDS Port Backlight Inverter VCC Selection (JP4) +12V +5V (Default) +3.3V (Default) Note: JP2 Default is two (2) jumpers placed on pins 3-5 and pins 2-4. 2.3.4 LVDS Port Backlight Lightness Control Mode Selection (JP5) 1 2 3 VR Mode PWM Mode (Default)
  • Page 26: Touch Screen 4,5,8 Wire Selection (Jp8)

    2.3.5 Touch Screen 4,5,8 Wire Selection (JP8) 1 2 3 4/8 Wires Mode (Default) 5 Wires Mode 2.3.6 Clear CMOS Jumper (JP9) 1 2 3 Normal (Default) Clear CMOS 2.3.7 Auto Power Button Enable/Disable Selection (JP10) 1 2 3 Disable/ATX Enable/AT (Default) Note: When disabled, use Power Button JP5 (pins 1-2) to power on the system.
  • Page 27: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function +5V Output for SATA HDD SATA Port External Power Input Audio I/O Port External +5VSB Input DDR4 SO-DIMM Slot COM Port 1 RS-232/422/485 COM Port 2 RS-232/422/485...
  • Page 28: Output For Sata Hdd (Cn1)

    Label Function CN25 LAN (RJ-45) Port1 CN26 Dual USB3.1 Port 0/Port 1 CN27 Dual USB3.1 Port 2/Port 3 CN28 HDMI Connector CN29 VGA Port CN30 M.2 B-Key 2280 CN31 LAN SDP CONN 2.4.1 +5V Output for SATA HDD (CN1) Pin Name Signal Type Signal Level 2.4.2...
  • Page 29: External Power Input (Cn3)

    Pin Name Signal Type Signal Level SATA_RX- DIFF SATA_RX+ DIFF 2.4.3 External Power Input (CN3) Pin Name Signal Type Signal Level +12V +9~+36V (or +12V) Note: There are two types of power input, 9~36V or 12V only; by BOM change. 2.4.4 Audio I/O Port (CN5) MIC_L...
  • Page 30: External +5Vsb Input (Cn6)

    Pin Name Signal Type Signal Level GND_AUDIO LINE_L_IN LINE_R_IN GND_AUDIO LEFT_OUT GND_AUDIO RIGHT_OUT +5V_AUDIO 2.4.5 External +5VSB Input (CN6) Pin Name Signal Type Signal Level PS_ON# +5VSB 2.4.6 DDR SO-DIMM Slot (CN7) Standard Specifications Chapter 2 – Hardware Information...
  • Page 31: Com Port 1 (Cn8)

    2.4.7 COM Port 1 (CN8) RS-232 Pin Name Signal Type Signal Level DCD1 DSR1 RTS1 ±5V ±5V CTS1 DTR1 ±5V RI1/+5V/+12V +5V/+12V Chapter 2 – Hardware Information...
  • Page 32 RS-485 Pin Name Signal Type Signal Level RS485_ D- ±5V RS485_D+ ±5V NC/+5V/+12V +5V/+12V RS-422 Pin Name Signal Type Signal Level RS422_TX- ±5V RS422_TX+ ±5V RS422_RX+ RS422_RX- NC/+5V/+12V +5V/+12V Chapter 2 – Hardware Information...
  • Page 33: Com Port 2 (Cn9)

    2.4.8 COM Port 2 (CN9) RS-232 Pin Name Signal Type Signal Level DCD2 DSR2 RTS2 ±5V ±5V CTS2 DTR2 ±5V RI2/+5V/+12V +5V/+12V Chapter 2 – Hardware Information...
  • Page 34 RS-485 Pin Name Signal Type Signal Level RS485_ D2- ±5V RS485_D2+ ±5V NC/+5V/+12V +5V/+12V RS-422 Pin Name Signal Type Signal Level RS422_TX2- ±5V RS422_TX2+ ±5V RS422_RX2+ RS422_RX2- NC/+5V/+12V +5V/+12V Note 1: COM2 RS-232/422/485 can be set by BIOS setting. Default is RS-232. Note 2: Pin 8 function can be set by JP3 (See Ch 2.3.2).
  • Page 35: Mini-Card Slot (Full-Mini Card) (Cn10)

    2.4.9 Mini-Card Slot (Full-Mini Card) (CN10) Pin Name Signal Type Signal level PCIE_WAKE# +3.3VSB +3.3V +1.5V +1.5V PCIE_CLK_REQ# UIM_PWR UIM_DATA PCIE_REF_CLK- DIFF UIM_CLK PCIE_REF_CLK+ DIFF UIM_RST UIM_VPP W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V Chapter 2 – Hardware Information...
  • Page 36 Pin Name Signal Type Signal level PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V Chapter 2 – Hardware Information...
  • Page 37: Ddr So-Dimm Slot (Cn11)

    Pin Name Signal Type Signal level +3.3VSB +3.3V 2.4.10 DDR SO-DIMM Slot (CN11) Standard Specifications 2.4.11 M.2 E-Key 2230 (CN12) Standard Specifications 2.4.12 LVDS Port Inverter /Backlight Connector (CN3) Pin Name Signal Type Signal level BKL_PWR +5V / +12V BKL_CONTROL BKL_ENABLE Note 1: LVDS BKL_PWR can be set to +5V or +12V by JP4.
  • Page 38: Lvds Port (Cn14)

    2.4.13 LVDS Port (CN14) Note: LVDS LCD_PWR can be set to +3.3V or +5V by JP4. (See Ch 2.3.3) Pin Name Signal Type Signal Level BKL_ENABLE BKL_CONTROL LCD_PWR +3.3V/+5V LVDS_A_CLK- DIFF LVDS_A_CLK+ DIFF LCD_PWR +3.3V/+5V LVDS_DA0- DIFF LVDS_DA0+ DIFF LVDS_DA1- DIFF LVDS_DA1+ DIFF...
  • Page 39: Usb 2.0 Port 5 (Cn15)

    Pin Name Signal Type Signal Level LVDS_DA3+ DIFF DDC_DATA +3.3V DDC_CLK +3.3V LVDS_DB0- DIFF LVDS_DB0+ DIFF LVDS_DB1- DIFF LVDS_DB1+ DIFF LVDS_DB2- DIFF LVDS_DB2+ DIFF LVDS_DB3- DIFF LVDS_DB3+ DIFF LCD_PWR +3.3V/+5V LVDS_B_CLK- DIFF LVDS_B_CLK+ DIFF 2.4.14 USB 2.0 Port 5 (CN15) Pin Name Signal Type Signal Level...
  • Page 40: Bios Debug Port (Cn16)

    Pin Name Signal Type Signal Level USB5_D+ DIFF 2.4.15 BIOS Debug Port (CN16) Pin Name Signal Type Signal Level SPI_MISO SPI_CLK +3.3VSB +3.3V SPI_MOSI SPI_CS Chapter 2 – Hardware Information...
  • Page 41: Usb 2.0 Port 6 (Cn17)

    2.4.16 USB 2.0 Port 6 (CN17) Pin Name Signal Type Signal Level +5VSB USB6_D- DIFF USB6_D+ DIFF G ND 2.4.17 LPC Port (CN18) Pin Name Signal Type Signal Level LAD0 +3.3V LAD1 +3.3V LAD2 +3.3V LAD3 +3.3V +3.3V +3.3V LFRAME# LRESET# +3.3V LCLK...
  • Page 42: Digital I/O Port (Cn19)

    Pin Name Signal Type Signal Level SMB_CLK/I2C_CLK SMB_ALERT/SERIRQ +3.3V 2.4.18 Digital I/O Port (CN19) DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7 Signal Description Signal Description +V5S 2.4.19 Nano SIM Card Socket (CN20) Pin Name Signal Type Signal Level UIM_PWR UIM_RST UIM_CLK Chapter 2 –...
  • Page 43: Touchscreen Connector (Optional) (Cn21)

    Pin Name Signal Type Signal Level UIM_VPP UIM_DATA 2.4.20 Touchscreen Connector (Optional) (CN21) Note: Touch mode can be set by BIOS. 8-Wire Pin Name Signal Type Signal Level TOP EXCITE BOTTOM EXCITE LEFT EXCITE RIGHT EXCITE TOP SENSE BOTTOM SENSE LEFT SENSE RIGHT SENSE Chapter 2 –...
  • Page 44 4-Wire Pin Name Signal Type Signal Level BOTTOM LEFT RIGHT 5-Wire Pin Name Signal Type Signal Level Chapter 2 – Hardware Information...
  • Page 45: Cpu Fan (Cn22)

    5-Wire Pin Name Signal Type Signal Level UL(Y) UR(H) LL(L) LR(X) SENSE(S) 2.4.21 CPU Fan (CN22) Pin Name Signal Type Signal Level FAN_POWER +12V FAN_TAC Chapter 2 – Hardware Information...
  • Page 46: Battery Connector (Cn23)

    2.4.22 Battery Connector (CN23) Pin Name Signal Type Signal level +3.3V 3.3V 2.4.23 LAN (RJ-45) Port 1/Port 2 (CN24/CN25) ACT/LINK SPEED Pin Name Signal Type Signal level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- DIFF...
  • Page 47: Usb 3.2 Gen 2 Ports 0 & 1 (Cn26)

    2.4.24 USB 3.2 Gen 2 Ports 0 & 1 (CN26) Pin Name Signal Type Signal Level +5VSB USB0_D- DIFF USB0_D+ DIFF USB0_SSRX− DIFF USB0_SSRX+ DIFF USB0_SSTX− DIFF USB0_SSTX+ DIFF +5VSB USB1_D- DIFF USB1_D+ DIFF USB1_SSRX− DIFF USB1_SSRX+ DIFF USB1_SSTX− DIFF USB1_SSTX+ DIFF Chapter 2 –...
  • Page 48: Usb 3.2 Gen 2 Ports 2 & 3 (Cn27)

    2.4.25 USB 3.2 Gen 2 Ports 2 & 3 (CN27) Pin Name Signal Type Signal Level +5VSB USB2_D- DIFF USB2_D+ DIFF USB2_SSRX− DIFF USB2_SSRX+ DIFF USB2_SSTX− DIFF USB2_SSTX+ DIFF +5VSB USB3_D- DIFF USB3_D+ DIFF USB3_SSRX− DIFF USB3_SSRX+ DIFF USB3_SSTX− DIFF USB3_SSTX+ DIFF Chapter 2 –...
  • Page 49: Hdmi (Cn28)

    2.4.26 HDMI (CN28) Pin Name Signal Type Signal Level HDMI_TX2+ DIFF HDMI_TX2- DIFF HDMI_TX1+ DIFF HDMI_TX1- DIFF HDMI_TX0+ DIFF HDMI_TX0- DIFF HDMI_CLK+ DIFF HDMI_CLK- DIFF DDC_CLK DDC_DATA HDMI_HPD Chapter 2 – Hardware Information...
  • Page 50: Vga Port (Cn29)

    2.4.27 VGA Port (CN29) Pin Name Signal Type Signal Level GREEN BLUE RED_GND_RTN GREEN_GND_RTN BLUE_GND_RTN DDC_DATA HSYNC VSYNC DDC_CLK 2.4.28 M.2 B-Key 2280 (CN30) Standard Specifications Chapter 2 – Hardware Information...
  • Page 51: Lan Spd Connector (Cn31)

    2.4.29 LAN SPD Connector (CN31) Pin Name Signal Type Signal Level SDP0 SDP1 SDP2 SDP3 Chapter 2 – Hardware Information...
  • Page 52: Assembly Options

    Assembly Options Option 1 Chapter 2 – Hardware Information...
  • Page 53 Option 2 Chapter 2 – Hardware Information...
  • Page 54: Block Diagram

    Block Diagram Chapter 2 – Hardware Information...
  • Page 55: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...
  • Page 56: System Test And Initialization

    System Test and Initialization The GENE-WHU6 board uses certain routines to perform testing and initialization during the boot up sequence. If an error, fatal or non-fatal, is encountered, the module will output a few short beeps or display an error message. The module can usually continue the boot up sequence with non-fatal errors.
  • Page 57: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...
  • Page 58: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...
  • Page 59: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...
  • Page 60: Advanced: Trusted Computing

    3.4.1 Advanced: Trusted Computing Options Summary Security Device Support Disable Enable Optimal Default, Failsafe Default Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. SHA-1 PCR Bank Disable Enable Optimal Default, Failsafe Default...
  • Page 61 Options Summary Platform Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or disable Platform Hierarchy Storage Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Storage Hierarchy Endorsement Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Endorsement Hierarchy TPM2.0 UEFI Spec Version TCG_1_2 TCG_2...
  • Page 62: Advanced: Cpu Configuration

    3.4.2 Advanced: CPU Configuration Options Summary Hyper-Threading Disabled Enabled Optimal Default, Failsafe Default Enable/Disable Hyper-Threading Technology Active Processor Cores Optimal Default, Failsafe Default Number of cores to enable in each processor package. Intel (VMX) Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.
  • Page 63: Advanced: Sata Configuration

    Options Summary Turbo Mode Disabled Enabled Optimal Default, Failsafe Default Enable/Disable Turbo mode 3.4.3 Advanced: SATA Configuration Options Summary SATA Controller(s) Disabled Enabled Optimal Default, Failsafe Default Enable/Disable SATA Device. mSATA port Disabled Enabled Optimal Default, Failsafe Default Enable or Disable SATA Port Port * Disabled Optimal Default, Failsafe Default...
  • Page 64: Advanced: Hardware Monitor

    3.4.4 Advanced: Hardware Monitor Chapter 3 – AMI BIOS Setup...
  • Page 65: Smart Fan Mode Configuration

    3.4.4.1 Smart Fan Mode Configuration Auto Duty Cycle Mode Options Summary FAN1 Output Output PWM mode (open drain) mode Linear Fan Application Optimal Default, Failsafe Default Output PWM mode (push pull) FAN1 Output mode Select Fan Mode Manual RPM Mode Manual Duty-Cycle Mode Auto RPM Mode Auto Duty-Cycle Mode...
  • Page 66 Auto RPM Mode Options Summary RPM Percentage Auto fan speed control. Fan speed will follow different temperature by different RPM 1-100 Temperature Chapter 3 – AMI BIOS Setup...
  • Page 67 Manual Duty Mode Options Summary Manual Duty Mode Optimal Default, Failsafe Default Manual mode fan control, user can write expected duty cycle (PWM fan type) 1-100 Chapter 3 – AMI BIOS Setup...
  • Page 68 Linear Fan Application Options Summary Auto RPM Mode 3000 Optimal Default, Failsafe Default Manual mode fan control, user can write expected RPM count 500-10000 Chapter 3 – AMI BIOS Setup...
  • Page 69: Advanced: Sio Configuration

    3.4.5 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup...
  • Page 70: Serial Port 1 Configuration

    3.4.5.1 Serial Port 1 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8h; IRQ=4 IO=2F8h; IRQ=3 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.
  • Page 71: Serial Port 2 Configuration

    3.4.5.2 Serial Port 2 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8h; IRQ=3 IO=3F8h; IRQ=4 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.
  • Page 72: Advanced: Power Management

    3.4.6 Advanced: Power Management Options Summary Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select system power mode Restore AC Power Last State Optimal Default, Failsafe Default Loss Always On Always Off IO Restore AC power Loss RTC wake system Disable Optimal Default, Failsafe Default from S5...
  • Page 73: Advanced: Digital Io Port Configuration

    3.4.7 Advanced: Digital IO Port Configuration Options Summary DIO Port* Output Input Set DIO as Input or Output Output Level High Optimal Default, Failsafe Default Set output level when DIO pin is output Chapter 3 – AMI BIOS Setup...
  • Page 74: Setup Submenu: Chipset

    Setup submenu: Chipset Chapter 3 – AMI BIOS Setup...
  • Page 75: Chipset: System Agent (Sa) Configuration

    3.5.1 Chipset: System Agent (SA) Configuration Chapter 3 – AMI BIOS Setup...
  • Page 76: Lvds Panel Configuration

    3.5.1.1 LVDS Panel Configuration Options Summary LVDS Disabled Enabled Optimal Default, Failsafe Default Enable/Disable this panel. LVDS Panel Type 640X480@60HZ 800X480@60HZ 800X600@60HZ 1024X600@60HZ 1024X768@60HZ Optimal Default, Failsafe Default 1280X768@60HZ 1280X800@60HZ 1280X1024@60HZ 1366X768@60HZ 1440X900@60HZ 1600X1200@60HZ 1920X1080@60HZ 1920X1200@60HZ Select LCD panel used by Internal Graphics Device by selecting the appropriate setup item.
  • Page 77 Options Summary Color Depth 18-bit Optimal Default, Failsafe Default 24-bit 36-bit 48-bit Select panel type Backlight Type Normal Optimal Default, Failsafe Default Inverted Select backlight control signal type Backlight Level Optimal Default, Failsafe Default 100% Select backlight control level Backlight PWM Freq 100Hz 200Hz 220Hz...
  • Page 78: Chipset: Pch Io Configuration

    3.5.2 Chipset: PCH IO Configuration Options Summary Full-MiniCard Slot SATA Function PCIe Optimal Default, Failsafe Default Select function enabled for Full-Size MiniCard Slot M.2 KEY-B Slot SATA Function PCIe Optimal Default, Failsafe Default Select function enabled for M.2 KEY-B M.2 KEY-B Slot X1/X2 Optimal Default, Failsafe Default Select X1/X2 for M.2 KEY-B Slot Chapter 3 –...
  • Page 79: Serial Io Configuration

    3.5.2.1 Serial IO Configuration Options Summary I2C3 Controller Disabled Enabled Optimal Default, Failsafe Default Enables/Disables Serial IO Controller Chapter 3 – AMI BIOS Setup...
  • Page 80: Setup Submenu: Security

    Setup submenu: Security Change User/Administrator Password You can set an Administrator Password or User Password. An Administrator Password must be set before you can set a User Password. The password will be required during boot up, or when the user enters the Setup utility. A User Password does not provide access to many of the features in the Setup utility.
  • Page 81: Security: Secure Boot

    3.6.1 Security: Secure Boot Options Summary Secure Boot Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key(PK) is enrolled and the System is in User mode. The mode change requires platform reset Secure Boot Mode Custom Optimal Default, Failsafe Default...
  • Page 82: Key Management

    3.6.1.1 Key Management Options Summary Factory Key Provision Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key(PK) is enrolled and the System is in User mode. The mode change requires platform reset Restore Factory Keys Force System to User Mode.
  • Page 83 Options Summary Restore DB defaults Restore DB variable to factory defaults Platform Key(PK) Details Export Update Delete Key Exchange Keys Details Export Update Append Delete Authorized Signatures Details Export Update Append Delete Forbidden Signatures Details Export Update Append Delete Authorized TimeStamps Update Append OsRecovery Signatures...
  • Page 84: Setup Submenu: Boot

    Setup submenu: Boot Options Summary Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enable/Disable showing boot logo. Lunch PXE ROM Disabled Optimal Default, Failsafe Default Enabled Controls the execution of UEFI and Legacy Network OpROM Chapter 3 – AMI BIOS Setup...
  • Page 85: Boot: Bbs Priorities

    3.7.1 Boot: BBS Priorities Chapter 3 – AMI BIOS Setup...
  • Page 86: Setup Submenu: Save & Exit

    Setup submenu: Save & Exit Chapter 3 – AMI BIOS Setup...
  • Page 87: Chapter 4 - Driver Installation

    Chapter 4 Chapter 4 – Driver Installation...
  • Page 88: Driver Download/Installation

    Driver Download/Installation Drivers for the GENE-WHU6 can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/p/3and-half-inches-subcompact-boards-gene-bt06 Download the driver(s) you need and follow the steps below to install them. Step 1 – Install Chipset Drivers Open the Step 1 –...
  • Page 89 Step 4 – Install Serial IO Drivers Open the Step 4 – Intel Serial IO folder and select your OS Run the SetupSerialIO.exe file in the folder Follow the instructions Drivers will be installed automatically Step 5 – Install LAN Driver Open the Step 5 –...
  • Page 90: Appendix A - I/O Information

    Appendix A Appendix A - I/O Information...
  • Page 91: I/O Address Map

    I/O Address Map Appendix A – I/O Information...
  • Page 92: Memory Address Map

    Memory Address Map Appendix A – I/O Information...
  • Page 93: Irq Mapping Chart

    IRQ Mapping Chart Appendix A – I/O Information...
  • Page 94 Appendix A – I/O Information...
  • Page 95: Appendix B - Mating Connectors And Cables

    Appendix B Appendix B – Mating Connectors and Cables...
  • Page 96: Mating Connectors And Cables

    Mating Connectors and Cables Mating Connector Connector Available Function Cable P/N Label Cable Vendor Model no +5Vout 2 Pins for PHR-2 1702150155 Connector HDD Power SATA Molex 88750-5318 SATA Cable 1709070500 Connector +9~24V Vin Power Cable 1702002010 Connector Audio Molex 51021-1000 Audio Cable 1709100254...
  • Page 97 Mating Connector Connector Available Function Cable P/N Label Cable Vendor Model no Digital I/O CN19 Neltron 2026B-10 Connector Touch Screen CN21 SHR-9V-S-B Connector CPU Fan CN22 Molex 22-01-2035 Connector External RTC CN23 Molex 51021-0200 Battery Cable 175011901C Connector Appendix B – Mating Connectors and Cables...

Table of Contents