Completing The Test; Frequency Protection; Underfrequency Protection Saptuf; Verifying The Settings - ABB RET670 Commissioning Manual

Section 11
Testing functionality by secondary injection
11.6.6.2
11.7
11.7.1
11.7.1.1
214
1. Check that the input logical signals BLOCK, CBOPEN and VTSU are logical
zero.
2. Supply a three-phase rated voltage in all three phases and note on the local
HMI that the TRIP logical signal is equal to the logical 0.
3. Switch off the voltage in all three phases.
After set tTrip time a TRIP signal appears on the corresponding binary output
or on the local HMI.
Note that TRIP at this time is a pulse signal, duration should
be according to set tPulse.
4. Inject the measured voltages at rated values for at least set tRestore time.
5. Activate the CBOPEN binary input.
6. Simultaneously disconnect all the three-phase voltages from the IED.
No TRIP signal should appear.
7. Inject the measured voltages at rated values for at least set tRestore time.
8. Activate the VTSU binary input.
9. Simultaneously disconnect all the three-phase voltages from the IED.
No TRIP signal should appear.
10. Reset the VTSU binary input.
11. Inject the measured voltages at rated values for at least set tRestore time.
12. Activate the BLOCK binary input.
13. Simultaneously disconnect all the three-phase voltages from the IED.
No TRIP signal should appear.
14. Reset the BLOCK binary input.

Completing the test

Continue to test another function or end the test by changing the TESTMODE
setting to Off. Restore connections and settings to their original values, if they were
changed for testing purposes.

Frequency protection

Underfrequency protection SAPTUF

Prepare the IED for verification of settings outlined in Section
to verify settings".

Verifying the settings

Verification of START value and time delay to operate
1MRK 504 165-UEN A
SEMOD175023-47 v4
"Preparing the IED
Transformer protection RET670 2.2 IEC
Commissioning manual
SEMOD53547-1 v1
M16289-2 v7
M16289-15 v3
M16289-17 v7