GE L90 Instruction Manual page 417

Line current differential system
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CHAPTER 5: SETTINGS
Operand type
Operand syntax
ELEMENT:
CT FAIL 1 PKP
CT fail
CT FAIL 1 OP
CT FAIL 2 to 4 (4 with breaker and
half software option)
ELEMENT:
Counter 1 HI
Digital counters
Counter 1 EQL
Counter 1 LO
Counter 2 to 8
ELEMENT:
DCUB TX1
Directional
DCUB TX2
comparison
DCUB TX3
unblocking scheme
DCUB TX4
(DCUB)
DCUB TRIP A
DCUB TRIP B
DCUB TRIP C
DCUB TRIP 3P
DCUB OP
ELEMENT:
Dig Element 1 PKP
Digital elements
Dig Element 1 OP
Dig Element 1 DPO
Dig Element 2 to 48
ELEMENT:
DIR BLOCK TX INIT
Blocking scheme
DIR BLOCK TX1 STOP
DIR BLOCK TX2 STOP
DIR BLOCK TX3 STOP
DIR BLOCK TX4 STOP
DIR BLOCK TRIP A
DIR BLOCK TRIP B
DIR BLOCK TRIP C
DIR BLOCK TRIP 3P
DIR BLOCK OP
ELEMENT:
DIR BLOCK1 TX INIT
Blocking 1 scheme
DIR BLOCK1 TX1 STOP
DIR BLOCK1 TX2 STOP
DIR BLOCK1 TX3 STOP
DIR BLOCK1 TX4 STOP
DIR BLOCK1 TRIP A
DIR BLOCK1 TRIP B
DIR BLOCK1 TRIP C
DIR BLOCK1 TRIP 3P
DIR BLOCK1 OP
ELEMENT:
DIR POWER 1 STG1 PKP
Sensitive directional
DIR POWER 1 STG2 PKP
power
DIR POWER 1 STG1 DPO
DIR POWER 1 STG2 DPO
DIR POWER 1 STG1 OP
DIR POWER 1 STG2 OP
DIR POWER 1 PKP
DIR POWER 1 DPO
DIR POWER 1 OP
DIR POWER 2
ELEMENT:
DUTT TX1
DUTT
DUTT TX2
(Direct underreach
DUTT TX3
transfer trip)
DUTT TX4
DUTT TRIP A
DUTT TRIP B
DUTT TRIP C
DUTT TRIP 3P
DUTT OP
ELEMENT:
TAP-LOCAL FAULT
Fault locator
L90 LINE CURRENT DIFFERENTIAL SYSTEM – INSTRUCTION MANUAL
Operand description
CT fail has picked up
CT fail has dropped out
Same set of operands as per CT FAIL 1
Digital counter 1 output is 'more than' comparison value
Digital counter 1 output is 'equal to' comparison value
Digital counter 1 output is 'less than' comparison value
Same set of operands as shown for Counter 1
Directional comparison unblocking scheme asserts transmit bit 1
Directional comparison unblocking scheme asserts transmit bit 2
Directional comparison unblocking scheme asserts transmit bit 3
Directional comparison unblocking scheme asserts transmit bit 4
Directional comparison unblocking scheme has operated to trip phase A
Directional comparison unblocking scheme has operated to trip phase B
Directional comparison unblocking scheme has operated to trip phase C
Directional comparison unblocking scheme has operated to trip all phases
Directional comparison unblocking scheme has operated
Digital Element 1 is picked up
Digital Element 1 is operated
Digital Element 1 is dropped out
Same set of operands as shown for Dig Element 1
Directional blocking signal is initiated
Directional blocking scheme de-asserts transmit bit no. 1
Directional blocking scheme de-asserts transmit bit no. 2
Directional blocking scheme de-asserts transmit bit no. 3
Directional blocking scheme de-asserts transmit bit no. 4
Directional blocking scheme has operated to trip phase A
Directional blocking scheme has operated to trip phase B
Directional blocking scheme has operated to trip phase C
Directional blocking scheme has tripped all 3 phases
Directional blocking scheme has operated
Directional blocking1 signal is initiated
Directional blocking1 scheme de-asserts transmit bit no. 1
Directional blocking1 scheme de-asserts transmit bit no. 2
Directional blocking1 scheme de-asserts transmit bit no. 3
Directional blocking1 scheme de-asserts transmit bit no. 4
Directional blocking1 scheme has operated to trip phase A
Directional blocking1 scheme has operated to trip phase B
Directional blocking1 scheme has operated to trip phase C
Directional blocking1 scheme has tripped all 3 phases
Directional blocking1 scheme has operated
Stage 1 of the directional power element 1 has picked up
Stage 2 of the directional power element 1 has picked up
Stage 1 of the directional power element 1 has dropped out
Stage 2 of the directional power element 1 has dropped out
Stage 1 of the directional power element 1 has operated
Stage 2 of the directional power element 1 has operated
The directional power element has picked up
The directional power element has dropped out
The directional power element has operated
Same set of operands as DIR POWER 1
Direct under-reaching transfer trip asserts transmit bit 1
Direct under-reaching transfer trip asserts transmit bit 2
Direct under-reaching transfer trip asserts transmit bit 3
Direct under-reaching transfer trip asserts transmit bit 4
Direct under-reaching transfer trip has operated to trip phase A
Direct under-reaching transfer trip has operated to trip phase B
Direct under-reaching transfer trip has operated to trip phase C
Direct under-reaching transfer trip has operated to trip all three phases
Direct under-reaching transfer trip has operated
Fault is located between local terminal and tap point (3-terminal only)
FLEXLOGIC
5
5-193

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