Fnc 53 - Hscs / High Speed Counter Set - Mitsubishi Electric MELSEC FX3U Programming Manual

Melsec fx series programmable logic controllers
Table of Contents

Advertisement

FX
/FX
/FX
Series Programmable Controllers
3G
3U
3UC
Programming Manual - Basic & Applied Instruction Edition
13.4
FNC 53 – HSCS / High Speed Counter Set
Outline
This instruction compares a value counted by a high speed counter with a specified value, and immediately
sets an external output (Y) if the two values are equivalent each other.
1. Instruction format
FNC 53
D
HSCS
2. Set data
Operand Type
S
1
S
2
D
3. Applicable devices
Bit Devices
Oper-
and
System User
Type
X
Y
M T C S D .b KnX KnY KnM KnS T C D R U \G
S
1
S
2
D
1: "D .b" is available only in FX
2: This function is supported only in FX
3: When using the counter interrupt function in FX
Explanation of function and operation
1. 32-bit operation (DHSCS)
When the current value of a high speed counter (C235 to C255) specified in
value [
+1,
S
1
"200" if the comparison value is K200), the bit device
This instruction is executed after the counting processing in the high speed counter.
Command
input
→ For the counter interrupt using HSCS instruction, refer to Section 36.6.
Mnemonic
16-bit Instruction
Data to be compared with the current data value of a high-speed counter or word
device number.
Device number of a high speed counter [C235 to C255]
Bit device number to be set to ON when the compared two values are equivalent
to each other
Digit Specification
1
and FX
3U
/FX
3U
→ For counter interrupt using HSCS instruction, refer to Section 36.6.
] (for example, when the current value changes from "199" to "200" or from "201" to
S
1
K2,147,483,647
S
2
Comparison
Comparison
value
source
FNC 53
S
S
1
2
DHSCS
13 High Speed Processing – FNC 50 to FNC 59
13.4 FNC 53 – HSCS / High Speed Counter Set
Operation Condition
32-bit Instruction
13 steps DHSCS
Description
Word Devices
System
Special
Index
User
Unit
V Z Modify
2
PLCs. However, index modifiers (V and Z) are not available.
3UC
PLCs.
3UC
/FX
PLCs, specify an interrupt pointer.
3U
3UC
is set to ON without regard to the operation cycle.
D
Output
destination
Set to ON.
D
S
S
=
1
2
Mnemonic
Operation Condition
Continuous
Operation
Data Type
32-bit binary
32-bit binary
Bit
Others
Real
Charac-
Constant
Number
ter String
K
H
E
" "
becomes the comparison
S
2
D
11
12
13
14
15
Pointer
P
16
3
17
18
19
20
365

Advertisement

Table of Contents
loading

This manual is also suitable for:

Melsec fx3ucMelsec fx3g

Table of Contents