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Address Register Name
0x50
BufControl
Buffer Control Register
This Buffer Control Register restores each pointer of the TxStreamArea, RxStreamArea, RxORBARea, and
RxHeaderArea to the initial set pointer address. It also controls updates of the LINKTxStreamPtr. This register
is read-only. If you read it, it always indicates zero.
bit7 Tx Stream Clear
Writing "1" to this bit changes the values of LINKTxStreamPtr and IDE_TxStreamPtr to ones set by the
TxStreamAreaStart Register.
bit6 Rx Stream Clear
Writing "1" to this bit changes the values of LINKRxStreamPtr and IDE_RxStreamPtr to ones set by the
RxStreamAreaStart Register.
bit5 Rx ORB Clear
Writing "1" to this bit changes the values of LINKRxORBPtr and IDE_RxORBPtr to ones set by the
RxORBAreaStart Register.
bit4 Rx Header Clear
Writing "1" to this bit changes the values of LINKRxHdrPtr and UsedRxHdrPtr to the value of 0x0100.
bit3::1 Reserved
bit0 Update LINKTxStreamPtr
Writing "1" to this bit updates the value of LINKTxStreamPtr to the latest value.
When the firmware transmits data, this bit confirms that the transmit is normally completed as an error recovery
to update the LINKTxStreamPtr. Do not use this bit in execution of the HwSBP2.
Bit Symbol
R/W
7: TxStreamClr
W
0: None Affect 1: Tx Stream Data Clear
6: RxStreamClr
W
0: None Affect 1: Rx Stream Data Clear
5: RxORBClr
W
0: None Affect 1: Rx ORB Dat Clear
4: RxHdrClr
W
0: None Affect 1: Rx Header Clear
3:
0:
2:
0:
1:
0:
0: UpdLinkTxStrm W
0: None Affect 1: Update Link Tx Stream Ptr
Description
1:
1:
1:
EPSON
S1R72803F00A
H.Rst S.Rst B.Rst
0x00 0x00
–
71
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