Table of Contents
Advertisement
Address
Register Name
0x58
BRstHdrPtr_H 7:
0x59
BRstHdrPtr_L
0x5A
BRstORBPtr_H 7:
0x5B
BRstORBPtr_L 7: BusRstORBPtr[7]
0x5C
(Reserved)
0x5D
(Reserved)
0x5E
MaintCtl_H
0x5F
MaintCtl_L
Bit Symbol
R/W
6:
5:
4: BusResetPtr[12]
3: BusResetPtr[11]
2: BusResetPtr[10]
1: BusResetPtr[9]
R
0: BusResetPtr[8]
7: BusResetPtr[7]
6: BusResetPtr[6]
5: BusResetPtr[5]
4:
3:
2:
1:
0:
6:
5:
4: BusRstORBPtr[12]
3: BusRstORBPtr[11]
2: BusRstORBPtr[10]
1: BusRstORBPtr[9]
0: BusRstORBPtr[8]
R
6: BusRstORBPtr[6]
5: BusRstORBPtr[5]
4: BusRstORBPtr[4]
3: BusRstORBPtr[3]
2: BusRstORBPtr[2]
1:
0:
7:
6:
5:
4:
3:
2:
1:
0:
7:
6:
5:
4:
3:
2:
1:
0:
7: E_Hcrc
R/W 0:
6: E_Dcrc
R/W 0:
5: No_Pkt
R/W 0:
4: F_Ack
R/W 0:
3: N_ack
R/W 0:
2:
1:
0:
7: Ack[7]
6: Ack[6]
5: Ack[5]
4: Ack[4]
R/W Optional AckCode
3: Ack[3]
2: Ack[2]
1: Ack[1]
0: Ack[0]
Description
Write is ignore
Read is always zero
Bus Reset Header Area Pointer
This register indicates Address in Rx Header Area
when BusRest detected.
Write is ignore
Read is always zero
Write is ignore
Read is always zero
Bus Reset ORB-Data Area Pointer
This register indicates Address in Rx ORB Data Area
when BusRest detected.
Write is ignore
Read is always zero
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
1: Add Header CRC Error
1: Add Data CRC Error
1: No Transmit Next Packet
1: Tx Optional AckCode
1: No Transmit AckPacket
0:
1:
0:
1:
0:
1:
EPSON
S1R72803F00A
H.Rst
S.Rst B.Rst
0x00
0x00
–
0x00
0x00
–
0x00
0x00
–
0x00
0x00
–
0x00
0x00
–
0x00
0x00
–
0x00
0x00
–
0x00
0x00
–
37
Advertisement
Table of Contents
