S1R72803F00A
Address
Register Name
0x3A
PageTableAdrs0
0x3B
PageTableAdrs1
0x3C
PageTableAdrs2
0x3D
PaqeTableAdrs3
0x3E
PageTableAdrs4
0x3F
PageTableAdrs5
Hardware SBP2 Page Table Address Set Register
This register specifies an address specified by the ORB of the SBP2. It is automatically updated in execution of the HwSBP2.
Page Table Offset Address
Write: Sets a Destination_Offset_Address accessed by the HwSBP2. It is ignored in execution of the HwSBP2.
Read: Indicates the PageTable address following one being processed by the HwSBP2.
66
Bit Symbol
R/W
7: PtAdress[47]
6: PtAdress[46]
5: PtAdress[45]
4: PtAdress[44]
3: PtAdress[43]
2: PtAdress[42]
1: PtAdress[41]
0: PtAdress[40]
7: PtAdress[39]
6: PtAdress[38]
5: PtAdress[37]
4: PtAdress[36]
3: PtAdress[35]
2: PtAdress[34]
1: PtAdress[33]
0: PtAdress[32]
7: PtAdress[31]
6: PtAdress[30]
5: PtAdress[29]
4: PtAdress[28]
3: PtAdress[27]
2: PtAdress[26]
1: PtAdress[25]
0: PtAdress[24]
R/W Write: Set PageTable Offset Address
7: PtAdress[23]
Read: Indicate NextPageTable Offset Address
6: PtAdress[22]
5: PtAdress[21]
4: PtAdress[20]
3: PtAdress[19]
2: PtAdress[18]
1: PtAdress[17]
0: PtAdress[16]
7: PtAdress[15]
6: PtAdress[14]
5: PtAdress[13]
4: PtAdress[12]
3: PtAdress[11]
2: PtAdress[10]
1: PtAdress[9]
0: PtAdress[8]
7: PtAdress[7]
6: PtAdress[6]
5: PtAdress[5]
4: PtAdress[4]
3: PtAdress[3]
2: PtAdress[2]
1: PtAdress[1]
0: PtAdress[0]
EPSON
Description
H.Rst S.Rst B.Rst
0x00 0x00
–
0x00 0x00
–
0x00 0x00
–
0x00 0x00
–
0x00 0x00
–
0x00 0x00
–