Table of Contents
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Pin Name
PIN
Other Pins
ICEMD
179
X2PSDX
155
XNMI
177
XRESET
178
HCLK
181
EXCLK_EN
116
TVEP
58
Test Pin
TI8
121
TO7
122
TO6
123
TO5
124
TO4
125
TO3
126
TO2
127
TO1
128
TO0
129
FLSTST
55
RAMTST
156
MonxWait
132
MonxInt
120
Power Pin
HV
–
DD
LV
–
DD
V
–
SS
N.C. Pin
N.C.
–
Table 6.1 Settings of EA10M2, EA10M1, and EA10M0 (Area 10 Boot Mode)
P_EA10M2
P_EA10M1
1
0
Note) Other settings are not available on this IC.
I/O Reset
I
Hi-Impedance Control: Set Hi-Z
for all outputs.
I
Double-speed mode setting pin
HIGH : BCLK = CPU Clock
LOW : BCLK = Half CPU Clock
I
NMIInput Pin
I
Initial Reset
O
Half SCLK Frequency Division Output LV
I
MCU clock switch pin
HIGH:Internal CLK
LOW:OSC3 Input
–
Flash Test Pin
I
O
–
(MSB)
O
–
O
–
O
–
Test Output Pin
O
–
O
–
O
–
O
–
(LSB)
I
–
Built-in Flash Test Pin
I
–
Built-in SRAM Test Pin
O
–
Internal Logic xWait Monitor Pin
O
–
Internal Logic xINT Monitor Pin
P
HIGH Power (5V)
5,21,37,67,83,130,165,176 (8 Pins)
P
LOW Power (3.3V)
1,47,93,103,114,139 (6 Pins)
P
GND
13,29,46,57,75,92,112,117,118,119,138,
148,157,159,170,173,180,184 (18 Pins)
–
2,45,48,91,94,137,140,172,183 (9 Pins)
P_EA10M0
1
1
1
1
Pin Function
Function
Built-in Flash Boot Mode
External ROM Mode
EPSON
S1R72803F00A
Remarks
Pull Down Resistor Integrated
HV
Input
DD
HV
Input, Pull Up Resistor Integrated
DD
HV
Input, Pull Up Resistor Integrated
DD
Output
DD
LV
Input
DD
Connect to HV
when it is mounted.
DD
Schmitt Input (Bus Holder)
Drive Ability 1mA
Pull Down Resistor Integrated
Pull Down Resistor Integrated
9
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