Figure 17. Spi Timing Diagram - Slave Mode And Cpha = 0; Figure 18. Spi Timing Diagram - Slave Mode And Cpha = 1 - STMicroelectronics STM32L100RC Manual

Ultra-low-power 32b mcu arm-based cortex-m3, 256kb flash, 16kb sram, 4kb eeprom, lcd, usb, adc, dac, memory i/f
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STM32L100RC

Figure 17. SPI timing diagram - slave mode and CPHA = 0

Figure 18. SPI timing diagram - slave mode and CPHA = 1

1. Measurement points are done at CMOS levels: 0.3V
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