Cpu Debug Pins - Xilinx Virtex-II Pro User Manual

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20. CPU Debug Pins

Figure 1-6
Table 1-12
Table 1-12: CPU Debug Pins
For details on CPU debug pins, refer to
Interfaces."
24
shows the location of the CPU debug pins on the debug
Figure 1-6: CPU Debug Connector, 16-Pin Male
shows the CPU debug pin locations for the available DUT package types.
Pin
CPU_TDO L20
CPU_TDI L21
CPU_TCK M21
CPU_TMS M20
CPU_HALT M19
CPU_TRST M18
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Chapter 1: Virtex-II Pro Prototype Platform
CPU_TMS
CPU_HALT
NC
NC
15 13 11 9 7 5 3
16 14 12 10 8 6 4
GND
NC
NC
NC
UG027_06_030402
FG456 FF672
AC8
AE8
W12
AA12
AB12
AC12
Appendix A, "RISCWatch and RISCTrace
Virtex-II Pro Prototype Platform User Guide
UG027 / PN 0402044 (v1.6) October 25, 2002
connector.
CPU_TCK
NC
CPU_TDI
CPU_TDO
1
2
NC
CPU_TRST
VCC3/VCCO
NC
FF1152
AC31
AC32
AA25
AA26
AD31
AB29