Features - Xilinx Virtex-II Pro User Manual

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Features

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The kit contains headers that can be soldered to the breakout area, if desired. These headers
are useful with certain types of oscilloscope probes for either connecting function
generators or wiring pins to the prototype area.
The Virtex-II Pro Prototype Platform board (referred to as "the board") contains a DUT
FPGA and two in-system XC18V04 programmable SPROMs. Each SPROM can hold up to
4,194,304 bits. The DUT can be configured either from the SPROMs or from the
configuration ports (Parallel III/IV cable).
In addition to the SPROMs and the configuration ports, there is an upstream connector and
a downstream connector. The upstream connector can be connected to configure the DUT
using the System ACE configuration solution. The downstream connector can be used to
connect to another board in a chain.
The board also contains an 8-MB SDRAM chip. This chip can be used as a scratch pad or to
hold programs when testing the embedded processor functionality.
12
Independent power supply jacks for V
Selectable V for each SelectI/O
CCO
Configuration port for use with Parallel Cable III and Parallel Cable IV cables
Headers for CPU debug, CPU trace, and JTAG CPU port
RS232 serial port
12 global clock (GCLK) inputs
♦
Four differential clock pairs
♦
Four LVTTL-type oscillator sockets
Eight pairs of ( TX, RX ) SMA inputs for the Rocket I/O transceivers
8 MB (32-bit data width) SDRAM
Power indicator LEDs
Two onboard SPROMs (4 Mb each) for any configuration mode
JTAG port for reprogramming the XC18Vxx series reconfigurable PROMs and the
user FPGA, also known as the Device Under Test (DUT)
Upstream and downstream System ACE and Configuration Interface connectors
Onboard battery holder
Two low-voltage, 14-pin, DIP crystal oscillators
www.xilinx.com
1-800-255-7778
Chapter 1: Virtex-II Pro Prototype Platform
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Virtex-II Pro Prototype Platform User Guide
UG027 / PN 0402044 (v1.6) October 25, 2002
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