Interrupt Masks; Statistics - Motorola MC68824 User Manual

BIEX - Bus Idle Timer Expired
This bit is set when the bus idle timer expires and the TBC has no frames to send, and does
not want to be in_ring, or is the sole_active_station. It implies that nothing has been sent on
the network for a long time, including tokens. This can happen if no station in the network
wants to be in_ring, or the ring has collapsed, or if there is a fault in this station's receiver.
TCE - Threshold Counter Exceeded
This bit is set if anyone of the statistic counters in the initialization table exceeded its threshold
value. See 2.2.13 Statistics for more detail.
LAS - Lose Address Sort
The TBC sets this bit when after six or seven slot times of silence, the TBC enters the claim
token procedure, but does not win. The TBC returns to the IDLE state. This bit, along with
the receive claim token, win address sort, and bus idle timer expired bits indicates that the
logical ring, if there was one, has collapsed.
MODER - Modem Error
This bit is set if the physical layer has signalled a modem detected error. The TBC monitors
error indication from the modem while in the idle state, or in the use token state. The modem
error bit may also be set by the TBC if indicated from the physical layer during the receive
or transmit test if run in external loopback. During transmission, this bit usually indicates
that the modem detected that the TBC has transmitted for more than a half second. If an
intelligent modem is used, then more information can be obtained via the physical command.
Upon detecting this event, the TBC sets this bit and goes to OFFLINE.
2.2.12 Interrupt Masks
Interrupt masks have the same format as interrupt status words. If an interrupt status condition
event occurs and the interrupt status bit is not already set, it causes an interrupt if the appropriate
mask bit is set to one. An interrupt vector is then requested by the host processor and the host
processor checks the interrupt status words to determine what caused the interrupt. If the mask
bit is set to zero and the event occurs, no interrupt will be generated; however, the corresponding
status bit in the interrupt status word will be set.
The format of interrupt mask 0 is shown below:
Offset F E D C B A
9 8 7
6
4 3 2
1 0
AA I RXDF I RXRWR I TXDF I TXRDF I TXRWR I UNR lOVER I BDPl I FDPl I BAERR I TP I TSK I TXQE I BDPE I FDPE I TCC
The format of interrupt mask 1 is shown below:
Offset F E D C B A
9 8 7
6
5 4 3 2 1 0
AE I MODER I
*
I LAS I TCE I BIEX I WAS I NRES I RECl IUNEXF101 SA I UEXF61 NSl I NS SC FTX I DMAD I
*Reserved
2.2.13 Statistics
The initialization table contains statistics about the operation of the network. The statistic counters
are 16-bit wrap-around counters. Every counter has a threshold variable. Whenever a counter is
incremented, the TBC checks whether its value has exceeded the threshold value set by the host.
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