Table of Contents
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Memory Access Using
Absolute Addresses
Contents of Chapter 9
9.1
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 4
9.2
Memory Access via Addresses in ACCU 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 8
9.2.1
LIR/TIR: Loading to or Transferring from a 16-Bit Memory Area Indirectly. . . . . . . . . 9 - 9
9.2.2
Examples of Access to DW > 255 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 15
9.2.3
LDI/TDI: Loading to or Transferring from a 32-Bit Memory Area Indirectly . . . . . . . 9 - 17
9.3
Transferring Memory Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 19
9.4
Operations with the Base Address Register (BR Register). . . . . . . . . . . . . . . . . . . . . . . 9 - 22
9.4.1
Operations for Transfer between Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 23
9.4.2
Accessing the Local Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 24
9.4.3
Accessing the Global Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 25
9.4.4
Accessing the Dual-Port RAM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 29
CPU 948 Programming Guide
C79000-G8576-C848-04
9
9 - 1
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