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Result
Error reaction
Load and transfer
operations for the
dual-port RAM memory
organized in bytes
CPU 948 Programming Guide
C79000-G8576-C848-04
Operations with the Base Address Register (BR Register)
You can evaluate the result of the TSC operation using condition
codes CC 0 and CC 1:
CC 1
CC 0
Description
0
0
The "occupied" register contains '0'. The CPU
enters its own slot ID.
1
0
The slot ID of the CPU is already entered in
the "occupied" register.
0
1
The "occupied" register contains a
different slot ID.
Note
All CPUs that require synchronized access to a common global
memory area (dual-port RAM area) must use the TSC operation.
The location must be on the corresponding module and on the
common page between F F400H and F FBFFH. If this is not the case,
the CPU recognizes a transfer error (TRAF) and calls OB 32. If
OB 32 is not loaded, the CPU changes to the stop mode with the error
code TRAF (ISTACK).
Table 9-11
Operations for access to pages organized in bytes
Operation
Operand
LY CB
-32768 to
+32767
LY CW
-32768 to
+32767
LY CD
-32768 to
+32767
Description
add the specified constant to content
of the BR register and load the byte
addressed in this way in the open page
1) 3)
into ACCU-1-LL
add the specified constant to content
of the BR register and load the word
addressed in this way in the open page
2) 3)
into ACCU-1-L
add the specified constant to content
of the BR register and load the double
word addressed in this way in the open
3)
page into ACCU 1
9 - 31
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