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Address Areas for
Peripherals and
Programming Them
Area
(absolute address)
E FE00
PII
(Process image input)
E FE7F
E FE80
PIQ
(Process image output)
E FEFF
"P" peripherals with process image
F F000
Digital peripherals
Inputs/outputs
F F07F
F F080
Digital or analog
peripherals
Inputs/outputs
F F0FF
"P" peripherals
F F100
Extended peripherals
Inputs/outputs
F F1FF
"O" peripherals
CPU 948 Programming Guide
C79000-G8576-C848-04
Referenced with
L IB / T IB
L IW / T IW
L ID / T ID
A I / AN I / O I / ON I
S I / R I / = I
L QB / T QB
L QW / T QW
L QD / T QD
A Q
/ AN Q / O Q / ON Q
S Q
/ R Q / = Q
When the operation is processed, only the process
image is changed. The new status of the process
image of the outputs is only output to the I/Os at
the end of the cycle.
L PY / T PY
L PW / T PW
L PY / T PY
L PW / T PW
The inputs and outputs are addressed directly in
bytes or words.
L OY / T OY
L OW / T OW
The inputs and outputs are addressed directly in
bytes or words.
Using STEP 5 operations, you can access peripherals either directly or
via the process image (PI). Note that a process image exists only for
input and output bytes of the "P" peripherals with byte addresses from
0 to 127!
Note
Using the interface modules IM 304, IM 307 and IM 308, you can
access distributed address areas using your program. This allows
access to two new address areas similar to the O area. In contrast
to the O area, however, access to these areas is only possible
using absolute addressing or using FB 196 of the "basic
functions" software package (refer to Catalog ST59).
Memory Assignment in the CPU 948
Parameter
0
to 127
0
to 126
0
to 124
0.0 to 127.7
0
to 127
0
to 126
0
to 124
0.0 to 127.7
0
to 127
0
128 to 255
128 to 254
0
to 255
0
to 254
to 126
8 - 9
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