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Programming Examples in the STL, LAD and CSF Methods of Representation
Counter operations
Set counter
Logical/circuit operation
I 4.1
KC 150
R S
CI
+
binary
CQ
16 bits
When the result of logic operation changes at the start input
(I 4.1) from "0" to "1", the counter is loaded with the specified
value (150).
The flag necessary for edge evaluation of the set input
is incorporated in the counter word.
BI and DE are digital outputs of the counter cell. The
value at BI is in binary code and the value at DE is in
BCD.
Reset counter
Logical/circuit diagram
I 4.2
R S CI
binary
CQ
=0 /
16 bits
Q 2.4
An RLO of "1" (I 4.2) resets the counter to zero.
An RLO of "0" does not affect the counter.
3 - 44
STEP 5 representation
Statement
Ladder
list
diagram
A
I
4.0
I 4.0
CU
C
1
CU
A
I
4.1
CD
L
KC
150
I 4.1
S
C
1
S
KC 150
CV
R
STEP 5 representation
Statement
Ladder
list
diagram
A
I
4.0
I 4.0
CD
C
2
CD
A
I
4.2
CU
R
C
2
A
C
2
S
=
Q
2.4
CV
I 4.2
R
Control system
flowchart
C1
I 4.0
I 4.1
BI
DE
KC 150
Q
Control system
flowchart
C2
CD
I 4.0
CU
BI
S
DE
CV
Q 2.4
Q
I 4.2
R
CPU 948 Programming Guide
C79000-G8576-C848-04
C1
CU
CD
S
BI
CV
DE
R
Q
C2
BI
DE
Q 2.4
Q
=
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