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TRAPS AND INTERRUPTS
II
The symbols Mres3, Ares3, Mres2, Ares2, Mresl, Aresl,
II
Iresl, KR, KI, and T refer to 64-bit FP registers.
II
The symbols Fsr3, Fsr2, Fsrl, Mergel032, Mergehi32, and Temp
II
refer to integer registers.
II
The symbols Lres3m, Lres2m, and Lreslm refer to memory locations.
st. c
rill,
fsr
II
Restore MERGE
shl
ixfr
shl
ixfr
ixfr
ixfr
faddz
faddz
II
Restore KR,
fld.l
fld.d
pfmul.dd
r2pt.dd
i2apt.dd
II
Restore 3rd
LIIl:
L1:
andh
bc.t
pfamov.ss
pfamov.dd
orh
andh
bc·t
pfld.l
pfld.d
andh
bc.t
pfmul.ss
pfmu13. dd
L2: or
andnot
st·c
16, Mergel032,
rl,
f2
16, Mergehi32,
rl,
f3
Mergel032,
Mergehi32,
fill,
f2,
fill,
f4,
KI, and T
SingOne,
DoubOne,
f4,
T,
KR,
fill,
KI,
fill,
stage
III
x2
III III III ,
Fsr3,
LIIl
Ares3,
fill,
Ares3,
fill,
ha%Lres3m, rill,
III
x 4
III III ,
Fsr3,
L1
I%Lres3m (r31> ,
I%Lres3m (r31> ,
IIlxll1lllllll, Fsr3,
L2
Mres3,
Mres3,
IIlxll1l,
f2,
f4,
Fsr3,
III
x 2
III ,
Temp,
Temp,
fsr
I I
clear FTE
rl
II
move low 16 bits to high 16
rl
II
move low 16 bits to high 16
f4
f5
fill
II
merge low 16s
fill
II
merge high 16s
f2
II
get single-precision 1.1Il
f4
II
get double-precision 1.1Il
fill
1/
put value of T in M 1st stage
fill
1/
load KR, advance t
fill
// load KI and T
rill
/1
test adder result precision ARP
1/
taken if it was single
fill
// insert single result
fill
1/
insert double result
r31
rill
// test load result precision LRP
// taken if it was single
fill
// insert single result
fill
// insert double result
rill
1/
test multiplier result precision MRP
// taken if it was single
fill
// insert single result
fill
// insert double result
Temp // set
U
(update) bit so that st.c
// will update status bits in pipeline
Temp // clear FTE bit so as not to cause traps
1/
update stage 3 result status
Example 7-2. Restoring Pipeline States (1 of 2)
7-13
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