Intel i86W Manual page 21

ARCHITECTURAL OVERVIEW
There are two classes of instructions:
• Core instructions (executed by the integer core unit).
• Floating-point and graphics instructions (executed by the floating-point unit and
graphics unit).
The processor has a dual-instruction mode that can simultaneously execute one instruc-
tion from each class (core and floating-point). Software can switch between dual- and
single-instruction modes. Within the floating-point unit, special dual-operation instruc-
tions (add-and-multiply, subtract-and-multiply) use the adder and multiplier units in
parallel. With both dual-instruction mode and dual operation instructions, the i860 mi-
croprocessor can execute three operations simultaneously.
The integer core unit manages data flow and loop control for the floating point units.
Together, they efficiently execute such common tasks as evaluating systems of linear
equations, performing the Fast Fourier Transform (FFT), and performing graphics
transformations.
1.2 INTEGER CORE UNIT
The core unit is the administrative center of the i860 microprocessor. The core unit
fetches both integer and floating-point instructions. It contains the integer register file,
and decodes and executes load, store, integer, bit, and control-transfer operations.
Its pipelined organization with extensive bypassing and scoreboarding maximizes
performance.
A complete list of its instruction categories includes ...
• Loads and stores between memory and the integer and floating-point registers.
Floating-point loads can be pipelined in three levels. A pixel store instruction contrib-
utes to efficient hidden-surface elimination.
• Transfers between the integer registers and the floating-point registers.
• Integer arithmetic for 32-bit signed and unsigned numbers. The 32-bit operations can
also perform arithmetic on smaller (8- or 16-bit) integers. Arithmetic on large (128-bit
or greater) integers can be implemented via short software macros or subroutines.
(The graphics unit provides arithmetic for 64-bit integers.)
• Shifts of the integer registers.
• Logical operations on the integer registers.
• Control transfers. There are both direct and indirect branches, a call instruction, and
a branch that can be used to form highly efficient loops. Many of these are delayed
transfers that avoid breaks in the instruction pipeline. One instruction provides effi-
cient loop control by combining the testing and updating of the loop index with a
delayed control transfer.
• System control functions.
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