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FLOATING-POINT INSTRUCTIONS
6.4.3 Floating-Point to Integer Conversion
fix.p fsrc1, fdest
(Floating-Point to Integer Conversion)
fdest
~
64-bit value with low-order 32 bits equal to integer part of fsrc1 rounded
pfix.p fsrc1, fdest
(Pipelined Floating-Point to Integer
Conversion)
fdest
~
last stage adder result
Advance A pipeline one stage
A pipeline first stage
~
64-bit value with low-order 32 bits
equal to integer part of fsrc1 rounded
ftrunc.p fsrc1, fdest
(Floating-Point to Integer Truncation)
fdest
~
64-bit value with low-order 32 bits equal to integer part of fsrc1
pftrunc.p fsrc1, fdest
(Pipelined Floating-Point to Integer
Truncation)
fdest
~
last stage adder result
Advance A pipeline one stage
A pipeline first stage
~
64-bit value with low-order 32 bits
equal to integer part of fsrc1
The instructions
fix, pfix,
ftrunc, and
pftrunc
must specify double-precision results. The
low-order 32 bits of the result contain the integer part of fsrcl represented in twos-
complement form. For
fix
and
pfix,
the integer is selected according to the rounding
mode specified by RM in the
fsr.
The instructions
ftrunc
and
pftrunc
are identical to
fix
and
pfix,
except that RM is not consulted; rounding is always toward zero. Assembler
and compilers should encode fsrc2 as
fO.
Traps
The instructions
fix, pfix,
ftrunc, and
pftrunc
signal overflow if the integer part of fsrcl is
bigger than what can be represented as a 32-bit twos-complement integer. Underflow
and inexact are never signaled.
6-13
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