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CHAPTER 4
ADDRESSING
Memory is addressed in byte units with a paged virtual-address space of 2
32
bytes. Data
and instructions can be located anywhere in this address space. Address arithmetic is
performed using 32-bit input values and produces 32-bit results. The low-order 32 bits of
the resul t are used in case of overflow.
Normally, multibyte data values are stored in memory in little endian format, i.e. with
the least significant byte at the lowest memory address. As an option that may be dy-
namically selected by software in supervisor mode, the i86W
M
microprocessor also offers
big endian mode, in which the most significant byte of a data item is at the lowest
address. The BE bit of
epsr
selects the mode, as Chapter 3 describes. Code accesses and
page directory/page table accesses are always done with little endian addressing.
Figure 4-1 shows the difference between the two storage modes. Figure 4-2 defines by
example how data is transferred from memory over the bus into a register in both modes.
Big endian and little endian data areas should not be mixed within a 64-bit data word.
Illustrations of data structures in this manual show data stored in little endian mode, i.e.
the rightmost (low-order) byte is at the lowest memory address.
4.1 ALIGNMENT
Alignment requirements are as follows:
• A 128-bit value is aligned to an address divisible by 16 when referenced in memory
(i.e. the four least significant address bits must be zero) or a data-access trap occurs.
LITTLE ENDIAN FORMAT
63
55
47
39
31
23
15
7
0
I I I I I I I I
I
m+7
m+6
m+5
m+4
m+3
m+2
m+1
m
BIG ENDIAN FORMAT
63
55
47
39
31
23
15
7
0
I I I I I I I I
I
m
m+1
m+2
m+3
m+4
m+5
m+6
m+7
m IS THE MEMORY ADDRESS OF THE WORD.
240329i
Figure 4-1. Memory Formats
4-1
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