6.24 Frequency/Voltage Control
Figure
Figure 66
Figure
Figure
66 66
66: Illustration of the Frequency/Voltage Control screen
: Illustration of the Frequency/Voltage Control screen
: Illustration of the Frequency/Voltage Control screen
: Illustration of the Frequency/Voltage Control screen
6.24.1
DRAM Clock
This chipset supports synchronous and asynchronous mode between host clock and DRAM clock
frequency.
Settings: [By SPD, 400 MHz, 533 MHz]
6.24.2
Spread Spectrum
When the mainboard's clock generator pulses, the extreme values (spikes) of the pulses create EMI
(Electromagnetic Interference). The Spread Spectrum function reduces the EMI generated by
modulating the pulses so that the spikes of the pulses are reduced to flatter curves.
Settings: [Disabled, +/- 0.1%, +/- 0.2%, +/- 0.3%, +/- 0.4%, +/- 0.5%, +/- 0.6%, +/- 0.7%, +/- 0.8%,
+/- 0.9%]
Phoenix - AwardBIOS CMOS Setup Utility
Frequency/Voltage Control
Current FSB Frequency
100 MHz
Current DRAM Frequency
533 MHz
DRAM Clock
[By SPD]
Spread Spectrum
[+/-0.1%]
: Move
Enter: Select
+/-/PU/PD: Value
F5: Previous Values
Item Help
Menu Level
F10: Save
ESC: Exit
F1: General Help
F7: Optimized Defaults
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